Epson S1C17624 Technical Manual page 113

P5[3:0] Port Function Select Register (P50_53PMuX)
Register name address Bit
P5[3:0] Port 0x52aa D7–6 P53MuX[1:0] P53 port function select
Function Select
(8 bits)
Register
(P50_53PMuX)
S1C17624/622 D5–4 P52MuX[1:0] P52 port function select
D3–2 P51MuX[1:0] P51 port function select
D1–0 P50MuX[1:0] P50 port function select
note: This register is effective only in the S1C17624/622.
The P50 to P53 port pins are shared with the peripheral module pins. This register is used to select how the pins are
used.
D[7:6] P53MuX[1:0]: P53 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): Reserved
0x1 (R/W): #BFR (I2CS)
0x0 (R/W): P53 (default)
D[5:4] P52MuX[1:0]: P52 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): TOUTB5 (T16A2 Ch.0 comparator mode)
or CAPB5 (T16A2 Ch.0 capture mode)
0x1 (R/W): SIN1 (UART Ch.1)
0x0 (R/W): P52 (default)
D[3:2] P51MuX[1:0]: P51 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): TOUTA5 (T16A2 Ch.0 comparator mode)
or CAPA5 (T16A2 Ch.0 capture mode)
0x1 (R/W): SOUT1 (UART Ch.1)
0x0 (R/W): P51 (default)
D[1:0] P50MuX[1:0]: P50 Port Function Select Bits
0x3 (R/W): Reserved
0x2 (R/W): Reserved
0x1 (R/W): SCLK1 (UART Ch.1)
0x0 (R/W): P50/EXCL6 (T16A Ch.1) (default)
To use the P50 pin for EXCL6 input, set P5OEN0/P5_OEN register to 0, P5IEN0/P5_IEN register to 1
and EXCL6S/P54_56PMUX register to 1.
S1C17624/604/622/602/621 TeChniCal Manual
name Function
Seiko epson Corporation
Setting
P53MUX[1:0] Function
0x3 reserved
0x2 reserved
0x1 #BFR
0x0 P53
P52MUX[1:0] Function
0x3 reserved
0x2 TOUTB5/CAPB5
0x1 SIN1
0x0 P52
P51MUX[1:0] Function
0x3 reserved
0x2 TOUTA5/CAPA5
0x1 SOUT1
0x0 P51
P50MUX[1:0] Function
0x3 reserved
0x2 reserved
0x1 SCLK1
0x0 P50/EXCL6
(Selectable only in the S1C17624)
(Selectable only in the S1C17624)
(EXCL6 is available only in the S1C17624.)
9 i/O PORTS (P)
init. R/W Remarks
0x0 R/W
0x0 R/W TOUTB5/CAPB5:
S1C17624 only
0x0 R/W TOUTA5/CAPA5:
S1C17624 only
0x0 R/W EXCL6:
S1C17624 only
(Set EXCL6S to 1.)
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