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Setting CBUFEN to 0 disables the compare buffer. The compare A and B signals will be generated by
comparing the counter values with the compare A and B register values.
note: Make sure the counter is halted (PRUN = 0) before setting CBUFEN.
D2
TRMD: Count Mode Select Bit
Selects the count mode.
1 (R/W): One-shot mode
0 (R/W): Repeat mode (default)
Setting TRMD to 0 sets the counter to repeat mode. In this mode, once the count starts, the counter con-
tinues counting until stopped by the application program.
Setting TRMD to 1 sets the counter to one-shot mode. In this mode, the counter stops counting auto-
matically as soon as the compare B signal is generated.
D1
PReSeT: Counter Reset Bit
Resets the counter.
1 (W):
Reset
0 (W):
Ignored
0 (R):
Normally 0 when read out (default)
Writing 1 to this bit resets the counter to 0.
note: Make sure the counter is halted (CLKEN/T16A_CLKx register = 0) before setting PRESET.
D0
PRun: Counter Run/Stop Control Bit
Starts/stops the count.
1 (W):
Run
0 (W):
Stop
1 (R):
Counting
0 (R):
Stopped (default)
The counter starts counting when PRUN is written as 1 and stops when written as 0. The counter data is
retained even if the counter is stopped.
T16a Counter Ch.x Data Registers (T16a_TCx)
Register name address
Bit
T16a Counter
0x5402
D15–0 T16aTC
Ch.x Data
0x5422
Register
(16 bits)
(T16a_TCx)
D[15:0]
T16aTC[15:0]: Counter Data Bits
Counter data can be read out. (Default: 0x0)
The counter value can be read out even if the counter is running. However, the counter value should be
read at once using a 16-bit transfer instruction. If data is read twice using an 8-bit transfer instruction,
the correct value may not be obtained due to occurrence of count up between readings.
S1C17624/604/622/602/621 TeChniCal Manual
name
Function
Counter data
[15:0]
T16ATC15 = MSB
T16ATC0 = LSB
Seiko epson Corporation
13 16-BiT PWM TiMeRS (T16a2)
Setting
init. R/W
0x0 to 0xffff
0x0
R
Remarks
13-15
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