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12.4
Setting and Resetting Counter Value
The T16E counter can be reset to 0 by writing 1 to the T16ERST/T16E_CTLx register.
Normally, the counter should be reset by writing 1 to this bit before starting the count.
The counter is reset by the hardware if the counter matches compare data B after the count starts.
The counter can also be set to any desired value by writing data to TC[15:0]/T16E_TCx register.
12.5
Compare Data Settings
Compare data register/buffer selection
The T16E module includes a data comparator allowing comparison of counter data against any desired value.
The compare data A and B registers are used for storing comparison data. Data can be read or written directly
from/to the compare data registers.
The compare data buffers enable automatic loading of the comparison values set in the buffers to the compare
data registers when the counter is reset via software (writing 1 to T16ERST) or by the compare B match signal.
CBUFEN/T16E_CTLx resister is used to set which of the compare data register and buffer the comparison val-
ues are written to.
Writing 1 to CBUFEN selects the compare data buffer. Writing 0 to it selects the compare data register. The
compare data register is selected after an initial reset.
Writing compare data
Compare data A is written to CA[15:0]/T16E_CAx register. Compare data B is written to CB[15:0]/T16E_CBx
register.
When CBUFEN is set to 0, the compare data register values can be read or written directly by these registers.
When CBUFEN is set to 1, data is read from and written to these registers via the compare data buffers. The
buffer contents are loaded into the compare data registers when the counter is reset.
The compare data registers and buffers are set to 0x0 after an initial reset.
The timer compares the count data against the compare data registers and generates a compare match signal
if the values are equal. This compare match signal generates an interrupt and controls the clock (TOUTx/
TOUTNx signal) output externally.
Compare data B also determines the counter reset cycle.
The counter reset cycle can be calculated as follows:
Counter reset interval = ———— [s]
Counter reset cycle = ———— [Hz]
CB:
Compare data B (T16E_CBx register value)
ct_clk: Count clock frequency
12.6
Timer Run/STOP Control
Make the following settings before starting T16E.
(1) Set the operating mode (input clock). See Section 12.3.
(2) Set the clock output conditions. See Section 12.7.
(3) If using interrupts, set the interrupt level and enable interrupts for T16E. See Section 12.8.
(4) Set the counter value or reset to 0. See Section 12.4.
(5) Set compare data. See Section 12.5.
The T16E module includes T16ERUN/T16E_CTLx register to control run/stop of the timer.
The timer starts counting when 1 is written to T16ERUN. Writing 0 to T16ERUN disables clock input and stops the
count.
S1C17624/604/622/602/621 TeChniCal Manual
CB + 1
ct_clk
ct_clk
CB + 1
Seiko epson Corporation
12 16-BiT PWM TiMeR (T16e)
12-3
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