Epson S1C17624 Technical Manual page 35

Cmos 16-bit single chip microcontroller
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Classification
Data transfer
ld.a
Integer arithmetic
add
operation
add/c
add/nc
add
add.a
add.a/c
add.a/nc
add.a
adc
adc/c
adc/nc
adc
sub
sub/c
sub/nc
sub
sub.a
sub.a/c
sub.a/nc
sub.a
sbc
sbc/c
sbc/nc
sbc
cmp
cmp/c
cmp/nc
cmp
cmp.a
cmp.a/c
cmp.a/nc
cmp.a
cmc
cmc/c
cmc/nc
cmc
S1C17624/604/622/602/621 TeChniCal Manual
Mnemonic
Memory (32 bits) → general-purpose register (*1)
%rd,[%rb]
%rd,[%rb]+
Memory address post-increment, post-decrement, and pre-decrement
%rd,[%rb]-
functions can be used.
%rd,-[%rb]
%rd,[%sp+imm7] Stack (32 bits) → general-purpose register (*1)
Memory (32 bits) → general-purpose register (*1)
%rd,[imm7]
General-purpose register (32 bits, zero-extended) → memory (*1)
[%rb],%rs
[%rb]+,%rs
Memory address post-increment, post-decrement, and pre-decrement
[%rb]-,%rs
functions can be used.
-[%rb],%rs
[%sp+imm7],%rs General-purpose register (32 bits, zero-extended) → stack (*1)
General-purpose register (32 bits, zero-extended) → memory (*1)
[imm7],%rs
SP → general-purpose register
%rd,%sp
PC → general-purpose register
%rd,%pc
Stack (32 bits) → general-purpose register (*1)
%rd,[%sp]
%rd,[%sp]+
Stack pointer post-increment, post-decrement, and pre-decrement functions
%rd,[%sp]-
can be used.
%rd,-[%sp]
General-purpose register (32 bits, zero-extended) → stack (*1)
[%sp],%rs
[%sp]+,%rs
Stack pointer post-increment, post-decrement, and pre-decrement functions
[%sp]-,%rs
can be used.
-[%sp],%rs
General-purpose register (24 bits) → SP
%sp,%rs
Immediate → SP
%sp,imm7
16-bit addition between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
%rd,imm7
16-bit addition of general-purpose register and immediate
24-bit addition between general-purpose registers
%rd,%rs
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
%sp,%rs
24-bit addition of SP and general-purpose register
24-bit addition of general-purpose register and immediate
%rd,imm7
%sp,imm7
24-bit addition of SP and immediate
%rd,%rs
16-bit addition with carry between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
%rd,imm7
16-bit addition of general-purpose register and immediate with carry
%rd,%rs
16-bit subtraction between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
%rd,imm7
16-bit subtraction of general-purpose register and immediate
%rd,%rs
24-bit subtraction between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
%sp,%rs
24-bit subtraction of SP and general-purpose register
%rd,imm7
24-bit subtraction of general-purpose register and immediate
24-bit subtraction of SP and immediate
%sp,imm7
%rd,%rs
16-bit subtraction with carry between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit subtraction of general-purpose register and immediate with carry
%rd,imm7
%rd,%rs
16-bit comparison between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
16-bit comparison of general-purpose register and immediate
%rd,sign7
%rd,%rs
24-bit comparison between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
24-bit comparison of general-purpose register and immediate
%rd,imm7
%rd,%rs
16-bit comparison with carry between general-purpose registers
Supports conditional execution (/c: executed if C = 1, /nc: executed if C = 0).
%rd,sign7
16-bit comparison of general-purpose register and immediate with carry
Seiko epson Corporation
Function
2 CPu
2-3

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