Epson S1C17624 Technical Manual page 256

23.6 Display Control
23.6.1 Display On/Off
The LCD display state is controlled using DSPC[1:0]/LCD_DCTL register.
For normal display, set DSPC[1:0] to 0x1. Note that the clock must be supplied. (See Section 23.3.)
If "Display off" is selected, the drive voltage supplied from the LCD system voltage regulator stops, and the V
V pins are all set to V
C3 SS
Since "All on" and "All off" directly control the driving waveform output by the LCD driver, display memory data
is not altered. COM pins are set to dynamic drive for "All on" and to static drive for "All off." This function can be
used to make the display flash on and off without altering the display memory.
DSPC[1:0] is reset to 0x0 (Display off) after an initial reset.
DSPC[1:0] is also reset to 0x0 when the slp instruction is executed and it reverts to the previous setting after
SLEEP mode is canceled.
23.6.2 lCD Contrast adjustment
The LCD contrast can be adjusted to one of 16 levels using LC[3:0]/LCD_CADJ register. Contrast is adjusted by
controlling the voltages V
LC[3:0] is set to 0x7 after an initial reset. Initialization via software is required to achieve the required contrast.
23.6.3 inverted Display
The LCD display can be inverted (black/white inversion) using merely control bit manipulation, without changing
the display memory. Setting DSPREV/LCD_DCTL register to 0 inverts the display; setting to 1 returns the display
to normal status.
Note that the display will not be inverted if "All off" is selected using DSPC[1:0]. The display will be inverted
when "All on" is selected.
S1C17624/604/622/602/621 TeChniCal Manual
Table 23. 6.1.1 LCD Display Control
DSPC[1:0]
0x3
0x2
0x1
0x0
level.
to V output by the internal LCD system voltage regulator.
C1 C3
Table 23. 6.2.1 LCD Contrast Adjustment
lC[3:0]
0xf
0xe
:
0x1
0x0
Seiko epson Corporation
23 lCD DRiVeR (lCD)
lCD display
All off (static)
All on (dynamic)
Normal display
Display off
(Default: 0x0)
Contrast
High (dark)
↑
:
↓
Low (light)
(Default: 0x7)
to
C1
23-13