Epson S1C17624 Technical Manual page 39

3 Memory Map
Figures 3.1, 3.2, and 3.3 show the S1C17624/604, S1C17622/602, and S1C17621 memory maps, respectively.
0xff ffff
Reserved for core I/O area
(1K bytes, 1 cycle)
0xff fc00
0xff fbff
reserved
0x02 8000
0x02 7fff
Flash area
(128K bytes, 1–5 cycles)
(Device size: 16 bits)
Vector table
0x00 8000
0x00 7fff
reserved
0x00 6000
0x00 5fff
Internal peripheral area 2
(4K bytes, 1 cycle)
0x00 5000
0x00 4fff
reserved
0x00 4400
0x00 43ff
Internal peripheral area 1
(1K bytes, 1 cycle)
0x00 4000
0x00 3fff
reserved
0x00 2000
0x00 1fff
Debug RAM area (64 bytes)
0x00 1fc0
Internal RAM area
(8K bytes, 1 cycle)
(Device size: 32 bits)
0x00 0000
S1C17624/604/622/602/621 TeChniCal Manual
0x5440–0x5fff
0x5400–0x543f
0x53c0–0x53ff
0x53a0–0x53bf
0x5380–0x539f
0x5360–0x537f
0x5340–0x535f
0x5320–0x533f
0x5300–0x531f
0x52c0–0x52ff
0x52a0–0x52bf
0x5280–0x529f
0x5200–0x527f
0x5180–0x51ff
0x5140–0x517f
0x5120–0x513f
0x5100–0x511f
0x50e0–0x50ff
0x50c0–0x50df
0x50a0–0x50bf
0x5060–0x509f
0x5040–0x505f
0x5020–0x503f
0x5000–0x501f
0x4380–0x43ff
0x4360–0x437f
0x4340–0x435f
0x4320–0x433f
0x42e0–0x431f
0x4280–0x42df
0x4220–0x427f
0x4200–0x421f
0x4140–0x41ff
0x4100–0x413f
0x4040–0x40ff
0x4020–0x403f
0x4000–0x401f
Figure 3. 1 S1C17624/604 Memory Map
Seiko epson Corporation
Peripheral function
reserved
16-bit PWM timer (T16A2) Ch.0–1
Display RAM (SEGRAM)
R/F converter (RFC)
A/D converter (ADC10)
reserved
IR remote controller (REMC)
MISC registers (MISC)
16-bit PWM timer (T16E) Ch.0
reserved
Port MUX (PMUX)
reserved
I/O ports (P)
reserved
Real-time clock (RTC)
Power generator (VD1)
SVD circuit (SVD)
reserved
8-bit OSC1 timer (T8OSC1)
LCD driver (LCD)
Clock generator (CLG)
Watchdog timer (WDT)
Stopwatch timer (SWT)
Clock timer (CT)
reserved
2
I C slave (I2CS)
I 2 C master (I2CM)
SPI Ch.0
Interrupt controller (ITC)
8-bit timer (T8F) Ch.1
16-bit timer (T16) Ch.0–2
8-bit timer (T8F) Ch.0
reserved
UART Ch.0–1
reserved
MISC registers (MISC)
reserved
3 MeMORY MaP
(Device size)
–
(16 bits)
(16 bits)
(16 bits)
(16 bits)
–
(16 bits)
(16 bits)
(16 bits)
–
(8 bits)
–
(8 bits)
–
(8 bits)
(8 bits)
(8 bits)
–
(8 bits)
(8 bits)
(8 bits)
(8 bits)
(8 bits)
(8 bits)
–
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
(16 bits)
–
(8 bits)
–
(8 bits)
–
3-1