Epson S1C17624 Technical Manual page 296

27 On-ChiP DeBuGGeR (DBG)
Register name address Bit
iRaM Size 0x5326 D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17622)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size 0x5326 D15–9 –
Select Register
(16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17602)
D3
D2–0 iRaMSZ[2:0] IRAM size select
iRaM Size 0x5326 D15–9 –
Select Register (16 bits)
D8
(MiSC_iRaMSZ)
D7
D6–4 –
(S1C17621)
D3
D2–0 iRaMSZ[2:0] IRAM size select
D[15:9] Reserved
D8 DBaDR: Debug Base address Select Bit
Selects the branching destination address when a debug interrupt occurs.
1(R/W): 0x0
0(R/W): 0xfffc00 (default)
D[7:3] Reserved
D[2:0] iRaMSZ[2:0]: iRaM Size Select Bits
Selects the size of the internal RAM to be used.
iRaMSZ[2:0]
0x3
0x2
0x1
Other
note: The MISC_IRAMSZ register is write-protected. To alter this register settings, you must override
this write-protection by writing 0x96 to the MISC_PROT register. Normally, the MISC_PROT reg-
ister should be set to a value other than 0x96, except when altering the MISC_IRAMSZ register.
Unnecessary rewriting of the MISC_IRAMSZ register may result in system malfunctions.
Debug RaM Base Register (DBRaM)
Register name address Bit
Debug RaM 0xffff90 D31–24 –
Base Register (32 bits)
D23–0 DBRaM[23:0] Debug RAM base address
(DBRaM)
(S1C17624/604/
602)
D[31:24] not used (Fixed at 0)
D[23:0] DBRaM[23:0]: Debug RaM Base address Bits (S1C17624/604/602)
Read-only register containing the beginning address of the debugging work area (64 bytes).
D[23:0] not used (undefined) (S1C17622/621)
27-4
name Function
reserved
DBaDR
Debug base address select
–
reserved
reserved
–
reserved
reserved
DBaDR
Debug base address select
–
reserved
reserved
–
reserved
reserved
DBaDR Debug base address select
– reserved
reserved
– reserved
Table 27. 4.2 Internal RAM Size Selection
S1C17624/604 S1C17622
2KB
4KB
8KB (default) Reserved (default)
Reserved Reserved
name Function
Unused (fixed at 0)
Seiko epson Corporation
Setting
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0]
0x3
0x2
Other reserved
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0]
0x7–0x0 reserved
–
1 0x0 0 0xfffc00
–
–
–
IRAMSZ[2:0]
0x7–0x0 reserved
internal RaM size
S1C17602
2KB Reserved
4KB Reserved (default) Reserved (default)
Reserved
Reserved
Setting
0x0
S1C17624/604: 0x1fc0
S1C17602: 0x0fc0
S1C17624/604/622/602/621 TeChniCal Manual
init. R/W Remarks
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x1 when being read.
– – 0 when being read.
Size 0x1 R/W
2KB
4KB
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x2 when being read.
– – 0 when being read.
Size 0x2 R/W
– – 0 when being read.
0 R/W
– – 0 when being read.
– – 0x2 when being read.
– – 0 when being read.
Size 0x2 R/W
S1C17621
Reserved
Reserved
Reserved
init. R/W Remarks
0x0 R
← R