Epson S1C17624 Technical Manual page 225

2
21 i C SlaVe (i2CS)
Start condition
PCLK
SCL1 (input)
SCL1 (output)
SDA1 (input)
SDA1 (output)
R/W
BUSY
SELECTED
RXRDY
RXOVF
DA_STOP
Receive data sift register
RDATA[7:0]
Interrupt
Figure 21.
Data reception
PCLK
SCL1 (input)
SCL1 (output)
SDA1 (input) D0'
SDA1 (output)
R/W
BUSY
SELECTED
RXRDY
RXOVF
DA_STOP
Receive data sift register shift
RDATA[7:0]
Interrupt
Receive interrupt
Figure 21.
21.6 i2CS interrupts
The I2CS module includes a function for generating the following three different types of interrupts.
• Transmit interrupt
• Receive interrupt
• Bus status interrupt
The I2CS module outputs one interrupt signal shared by the three above interrupt causes to the interrupt controller
(ITC).
Transmit interrupt
When the transmit data written to SDATA[7:0]/I2CS_TRNS register is sent to the shift register, TXEMP/I2CS_
ASTAT register is set to 1 and an interrupt signal is output to the ITC. An interrupt occurs if other interrupt con-
ditions are satisfied. This interrupt can be used to write the next transmit data to SDATA[7:0].
Set TXEMP_IEN/I2CS_ICTL register to 1 when using this interrupt. If TXEMP_IEN is set to 0 (default), inter-
rupt requests by this cause will not be sent to the ITC.
Receive interrupt
When the received data is loaded to RDATA[7:0]/I2CS_RECV register, RXRDY/I2CS_ASTAT register is set to
1 and an interrupt signal is output to the ITC. An interrupt occurs if other interrupt conditions are satisfied. This
interrupt can be used to read the received data from RDATA[7:0].
Set RXRDY_IEN/I2CS_ICTL register to 1 when using this interrupt. If RXRDY_IEN is set to 0 (default), in-
terrupt requests by this cause will not be sent to the ITC.
21-8
Slave address reception
A6 A5 A4 A3
sift shift shift
5.7 I2CS Timing Chart 3 (start condition → data reception)
Clock stretch
D7 D6
ACK
shift shift
Receive data is read.
5.8 I2CS Timing Chart 4 (data reception → stop condition)
Seiko epson Corporation
A2 A1 A0 R/W = 0
shift shift shift shift
Data reception
D5 D4 D3 D2
shift shift shift
D[7:0]'
S1C17624/604/622/602/621 TeChniCal Manual
Data reception
D7 D6
ACK
shift shift shift
Stop condition
D1 D0
NAK
shift shift
D[7:0]
Receive interrupt
Bus status interrupt
D5