Table of Contents
Advertisement
Chip (S1C17622)
SCLK1/AIN4/P16
98
AIN3/P17
99
AIN2/P20
100
AIN1/P21
101
AIN0/P22
102
V
103
DD
SENB0/P23
104
SENA0/P24
105
REF0/P25
106
RFIN0/P26
107
V
108
SS
SOUT1/RFIN1/P27
109
SIN1/REF1/P30
110
SCL0/SENA1/P31
111
SDA0/SENB1/P32
112
#BFR/P53
113
LFRO/P54
114
P55
115
P56
116
SCL1/SCL0/P33
117
SDA1/SDA0/P34
118
FOUT1/#BFR/P35
119
TOUT3/RFCLKO/P36
120
TOUTN3/LFRO/TOUT4/P37
121
FOUTH/P40
122
P41/DSiO
123
P42/DST2
124
P43/DClK
125
N.C.
126
SeG0
127
SeG1
128
SeG2
129
SeG3
130
Chip size
X = 4.200 mm, Y = 4.256 mm
Pad opening
No. 1 to 32, 66 to 97:
No. 33 to 65, 98 to 130: X = 85 µm, Y = 87 µm
Chip thickness 400 µm
* The S1C17622 chip has the same pad configuration and coordinates as those of the S1C17624.
However, 16-bit PWM timer (T16A2) input/output signals (EXCL5, TOUTA5/CAPA5, TOUTB5/CAPB5,
EXCL6, TOUTA6/CAPA6, and TOUTB6/CAPB6) are not assigned to the S1C17622 pads.
S1C17624/604/622/602/621 TeChniCal Manual
Figure 1.
3.3.2 S1C17622 Pad Configuration Diagram
X = 87 µm, Y = 85 µm
Seiko epson Corporation
Y
X
(0, 0)
CJ624D***
4.200 mm
1 OVeRVieW
V
65
SS
V
64
C1
V
63
C2
V
62
C3
Ca
61
CB
60
59
N.C.
N.C.
58
N.C.
57
COM0
56
COM1
55
COM2
54
COM3
53
SeG55/COM4
52
SeG54/COM5
51
SeG53/COM6
50
SeG52/COM7
49
SeG51
48
SeG50
47
SeG49
46
SeG48
45
SeG47
44
SeG46
43
SeG45
42
SeG44
41
SeG43
40
SeG42
39
SeG41
38
SeG40
37
SeG39
36
Die No.
SeG38
35
SeG37
34
SeG36
33
1-11
Advertisement
Table of Contents
