Epson S1C17624 Technical Manual page 276

25 R/F COnVeRTeR (RFC)
25.2 RFC input/Output Pins
Table 25.2.1 lists the RFC input/output pins.
Pin name i/O
SENB0/SENB1 I/O
SENA0/SENA1 I/O
REF0/REF1 I/O
RFIN0/RFIN1 I/O
RFCLKO O
notes: 1. The pins go to high impedance status when the port function is switched for the R/F converter.
2. The RFINx pin goes to V
large current may flow through the RFINx pin if the pin is externally biased.
The R/F converter input/output pins are shared with I/O ports and are initially set as general-purpose I/O port pins.
The pin functions must be switched using the port function select bits to use the general-purpose I/O port pins as R/
F converter input/output pins.
For detailed information on pin function switching, see the "I/O Ports (P)" chapter.
25.3 Operation Clock
The RFC module includes a clock source selector, dividers, and a gate circuit for controlling the operation clock.
note: The operation clock (TCCLK) must be enabled before setting the R/F converter. Otherwise, the R/
F converter cannot operate normally.
Clock source selection
Use RFTCKSRC/OSC_RFC register to select the clock source from HSCLK (IOSC or OSC3) and OSC1. Set-
ting RFTCKSRC to 1 (default) selects OSC1 and setting it to 0 selects HSCLK.
Clock division ratio selection
When the clock source is OSC1
No division ratio needs to be selected when OSC1 is selected for the clock source. The OSC1 clock (typ.
32.768 kHz) is directly used as TCCLK.
When the clock source is HSCLK
When HSCLK is selected for the clock source, use RFTCKDV[1:0]/OSC_RFC register to select the divi-
sion ratio.
The time base counter uses the clock selected here for counting. Selecting a high-speed clock improves the
conversion accuracy. However the clock must be selected so that the time base counter will not overflow in the
reference oscillation phase.
Clock enable
The clock supply is enabled with RFTCKEN/OSC_RFC register. The RFTCKEN default setting is 0, which
stops the clock. Setting RFTCKEN to 1 feeds the clock generated as above to the RFC circuit. If no RFC opera-
tion is required, stop the clock to reduce current consumption.
note: Be sure to set RFTCKEN to 0 before selecting a clock division ratio.
25-2
Table 25. 2.1 List of R/F Converter Input/Output Pins
Qty
2 Sensor B oscillation control pin (see Note 1 below)
2 Sensor A oscillation control pin (see Note 1 below)
2 Reference oscillation control pin (see Note 1 below)
2 RFCLK input and oscillation control pin (see Note 2 below)
1 RFCLK monitoring output pin
Outputs RFCLK to monitor the oscillation frequency.
level when the port function is switched for the R/F converter. A
SS
Table 25. 3.1 HSCLK Division Ratio Selection
RFTCKDV[1:0]
0x3
0x2
0x1
0x0
Seiko epson Corporation
Function
Division ratio
1/8
1/4
1/2
1/1
(Default: 0x0)
S1C17624/604/622/602/621 TeChniCal Manual