Epson S1C17624 Technical Manual page 118

Cmos 16-bit single chip microcontroller
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10 Fine MODe 8-BiT TiMeRS (T8F)
One-shot mode
Count clock
PRESER write
PRUN
Counter
Interrupt request
Repeat mode
Count clock
PRESER write
PRUN
Counter
Interrupt request
10.7
T8F Output Signals
The T8F module outputs underflow pulses when the counter underflows.
These pulses are used for timer interrupt requests.
These pulses are also used to generate a UART clock. The clock generated is sent to the internal peripheral module,
as shown below.
T8F Ch.0 output clock → UART Ch.0
T8F Ch.1 output clock → UART Ch.1
Underflow signal
Interrupt request to the ITC
Use the following equations to calculate the reload data register value for obtaining the desired transfer rate.
clk_in
bps = —————————————
{(T8F_TR + 1) × 16 + TFMD}
(
clk_in
T8F_TR =
——— - TFMD - 16
bps
bps:
Transfer rate (bits/second)
clk_in:
Count clock (PCLK/1 to PCLK/16384) frequency [Hz]
T8F_TR: Reload data (0 to 255)
TFMD: Fine mode setting (0 to 15)
10.8
Fine Mode
Fine mode provides a function that minimizes transfer rate errors.
T8F can output a programmable clock signal for use as the UART serial transfer clock. The timer output clock can
be set to the required frequency by selecting the appropriate count clock and reload data. Note that errors may oc-
cur, depending on the transfer rate. Fine mode extends the output clock cycle by delaying the underflow pulse from
the counter. This delay can be specified with the TFMD[3:0]/T8F_CTLx register.
TFMD[3:0] specifies the delay pattern to be inserted into a 16 underflow period. Inserting one delay extends the
output clock cycle by one count clock cycle. This setting delays the interrupt timing in the same way.
10-4
Set by software
n
n-1
Set by software
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n-1
Figure 10.
6.1 Count Operation
Timer output
(to UART)
Figure 10.
7.1 T8F Output Clock
)
÷ 16
Seiko epson Corporation
Reset by hardware
1
0
1
0
n
n-1
S1C17624/604/622/602/621 TeChniCal Manual
n
Reset by software
1
0
n
n-1

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