Epson S1C17624 Technical Manual page 79

8.3.3 12/24-hour Mode and Counter Settings
12-hour/24-hour mode selection
Whether to use the time clock in 12-hour or 24-hour mode can be selected using RTC24H/RTC_CNTL0 register.
RTC24H = 1: 24-hour mode
RTC24H = 0: 12-hour mode
The count range of hour counters changes with this selection.
Basically, this setting should be changed while the counters are idle. RTC24H is allocated to the same address
as the control bits that start the counters. Therefore, 12-hour mode or 24-hour mode can be selected at the same
time the counters are started.
note: Rewriting RTC24H may corrupt count data for the hours, days, months, years or days of the week.
Therefore, once RTC24H settings are changed, be sure to set data back in these counters again.
Checking a.M./P.M. with 12-hour mode selected
When 12-hour mode is selected, RTCAP/RTC_HOUR register that indicates A.M. or P.M. is enabled.
RTCAP = 0: A.M.
RTCAP = 1: P.M.
For 24-hour mode, RTCAP is fixed to 0.
When setting the time of day, write either of the values above to this bit to specify A.M. or P.M.
Counter settings
Idle counters can be accessed for read or write at any time.
However, settings like those shown below should be avoided, since such settings may cause timekeeping errors.
• Settings exceeding the effective range
Do not set count data exceeding 60 seconds, 60 minutes, 12 or 24 hours, 31 days, 12 months, or 99 years.
• Settings nonexistent in the calendar
Do not set such nonexistent dates as April 31 or February 29, 2006. Even if such settings are made, the
counters operate normally, so that when 1 is carried over from the hour counter to the 1-day counter, the day
counter counts up to the first day of the next month. (For April 31, the day counter counts up to May 1; for
February 29, 2006, the day counter counts up to March 1, 2006.)
If any counter must be rewritten while operating, there is a procedure that must be followed to ensure that the
counter is rewritten correctly. For details, see Section 8.3.5, "Counter Hold and Busy Flag."
8.3.4 Start/Stop and Software Reset
Starting and stopping divider
The RTC starts counting when RTCSTP/RTC_CNTL0 register is set to 0, and stops counting when this bit is
set to 1.
The RTC is started/stopped by writing data to RTCSTP at the 32-kHz input clock divide-by stage of 8,192 Hz
or those stages that follow. The RTC does not stop at up to the input clock divide-by-2 stage (16,384 Hz).
If the RTC stops counting when 1 is carried over to the next-digit counter, the count value may be corrupted.
Therefore, see the next section to ensure that 1 is not carried over when counters are made to stop. This is un-
necessary, however, when the contents of all counters are newly set again.
Software reset
RTCRST/RTC_CNTL0 register is the software reset bit used to reset the items shown below.
• Divider
• Interrupt request signal
• Some register bits (see Section 8.5 for the control bits and their initial values.)
To perform software reset, write 1 to RTCRST and then write back to 0.
The divider bits above are all cleared 0. The interrupt request signal becomes inactive while RTCRST is set to 1
and is enabled to be output again after RTCRST is set to 0 (except when RTCCE = 0).
S1C17624/604/622/602/621 TeChniCal Manual
Seiko epson Corporation
8 Real-TiMe ClOCK (RTC)
8-5