Epson S1C17624 Technical Manual page 348

aPPenDiX a liST OF i/O ReGiSTeRS
Register name address Bit
RFC interrupt 0x53ac D15–5 –
Mask Register
(16 bits)
D4
(RFC_iMSK)
D3
D2
D1
D0
RFC interrupt 0x53ae D15–5 –
Flag Register (16 bits)
D4
(RFC_iFlG)
D3
D2
D1
D0
0x5068, 0x5400–0x540c
Register name address Bit
T16a Clock 0x5068 D7–4 ClKDiV
Control Register (8 bits)
Ch.0
(T16a_ClK0)
D3–2 ClKSRC
D1
D0
T16a Counter 0x5400 D15–7 –
Ch.0 Control
(16 bits)
D6
Register D5–4 CCaBCnT
(T16a_CTl0)
D3
D2
D1
D0
T16a Counter 0x5402 D15–0 T16aTC
Ch.0 Data (16 bits)
Register
(T16a_TC0)
aP-a-26
name Function
reserved
OVTCie
TC overflow error interrupt enable
OVMCie
MC overflow error interrupt enable
eSenBie
Sensor B oscillation completion
interrupt enable
eSenaie Sensor A oscillation completion
interrupt enable
eReFie Reference oscillation completion
interrupt enable
reserved
OVTCiF TC overflow error interrupt flag
OVMCiF
MC overflow error interrupt flag
eSenBiF Sensor B oscillation completion
interrupt flag
eSenaiF
Sensor A oscillation completion
interrupt flag
eReFiF
Reference oscillation completion
interrupt flag
16-bit PWM Timer (T16a2) Ch.0 (S1C17624/604)
name Function
Clock division ratio select
[3:0]
Clock source select
[1:0]
MulTiMD
Multi-comparator/capture mode
select
ClKen
Count clock enable
reserved
hCM
Half clock mode enable
Counter select
[1:0]
CBuFen Compare buffer enable
TRMD
Count mode select
PReSeT Counter reset
PRun
Counter run/stop control
Counter data
[15:0] T16ATC15 = MSB
T16ATC0 = LSB
Seiko epson Corporation
Setting init. R/W
–
1 Enable 0 Disable
1 Enable 0 Disable
1 Enable 0 Disable
1 Enable 0 Disable
1 Enable 0 Disable
–
1 Cause of 0 Cause of
interrupt interrupt not
occurred occurred
Setting init. R/W
Division ratio 0x0 R/W
CLKDIV[3:0] OSC3 or OSC1
IOSC
0xf – –
0xe 1/16384 –
0xd 1/8192 –
0xc 1/4096 –
0xb 1/2048 –
0xa 1/1024 –
0x9 1/512 –
0x8 1/256 1/256
0x7 1/128 1/128
0x6 1/64 1/64
0x5 1/32 1/32
0x4 1/16 1/16
0x3 1/8 1/8
0x2 1/4 1/4
0x1 1/2 1/2
0x0 1/1 1/1
CLKSRC[1:0] Clock source 0x0 R/W
0x3 External clock
0x2 OSC3
0x1 OSC1
0x0 IOSC
1 Multi 0 Normal
1 Enable 0 Disable
–
1 Enable 0 Disable
CCABCNT[1:0] Counter Ch. 0x0 R/W
0x3, 0x2 reserved
0x1 Ch.1
0x0 Ch.0
1 Enable 0 Disable
1 One-shot 0 Repeat
1 Reset 0 Ignored
1 Run 0 Stop
0x0 to 0xffff 0x0
S1C17624/604/622/602/621 TeChniCal Manual
Remarks
– – 0 when being read.
0 R/W
0 R/W
0 R/W
0 R/W
0 R/W
– – 0 when being read.
0 R/W Reset by writing 1.
0 R/W
0 R/W
0 R/W
0 R/W
Remarks
0 R/W
0 R/W
– – 0 when being read.
0 R/W
0 R/W
0 R/W
0 W 0 when being read.
0 R/W
R