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9 i/O PORTS (P)
P0 Port Key-entry Reset Configuration Register (P0_KRST)
Register name address
Bit
P0 Port Key-
0x5209
D7–2 –
entry Reset
(8 bits)
D1–0 P0KRST[1:0] P0 port key-entry reset
Configuration
Register
(P0_KRST)
D[7:2]
Reserved
D[1:0]
P0KRST[1:0]: P0 Port Key-entry Reset Configuration Bits
Selects the port combination used for P0 port key-entry reset.
The key-entry reset function performs an initial reset by inputting Low level simultaneously to the ports
selected here. For example, if P0KRST[1:0] is set to 0x3, an initial reset is performed when the four
ports P00 to P03 are simultaneously set to Low level.
Set P0KRST[1:0] to 0x0 when this reset function is not used.
note: The P0 port key-entry reset function is disabled at initial reset and cannot be used for power-
on reset.
Px Port input enable Registers (Px_ien)
Register name address
Bit
Px Port input
0x520a
D7–0 Pxien[7:0] Px[7:0] port input enable
enable Register
0x521a
(Px_ien)
0x522a
0x523a
0x524a
0x525a
(8 bits)
note: The PxIENy bits for unavailable ports are reserved and always read as 0.
D[7:0]
Pxien[7:0]: Px[7:0] Port input enable Bits
Enables or disables port inputs.
1 (R/W): Enable (default)
0 (R/W): disable
PxIENy is the input enable bit that corresponds directly to the Pxy port. Setting to 1 enables input and
the corresponding port pin input or output signal level can be read out from the Px_IN register. Setting
to 0 disables input.
Refer to Table 9.3.1 for more information on port input/output status, including settings other than for
the Px_IEN register.
9-12
name
Function
reserved
configuration
Table 9.
9.3 P0 Port Key-Entry Reset Settings
P0KRST[1:0]
0x3
0x2
0x1
0x0
name
Function
Seiko epson Corporation
Setting
–
P0KRST[1:0]
Configuration
0x3
P0[3:0]
0x2
P0[2:0]
0x1
P0[1:0]
0x0
Disable
Ports used for resetting
P00, P01, P02, P03
P00, P01, P02
P00, P01
Not used
(Default: 0x0)
Setting
1 Enable
0 Disable
S1C17624/604/622/602/621 TeChniCal Manual
init. R/W
Remarks
–
–
0 when being read.
0x0 R/W
init. R/W
Remarks
1
R/W
(0xff)
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