In A Pci Dsp-To-Host Transaction:; If Fc = $1:; If Fc = $2:; If Fc = $3: - Motorola DSP56305 User Manual

24-bit digital signal processor
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6.5.3.4

In a PCI DSP-to-Host Transaction:

6.5.3.4.1
If FC = $0 (32-bit data mode):
The two least significant bytes of the first word written to the DTXM and the two least
significant bytes of the second word written to the DTXM are output to the
HAD31-HAD0 signals. HAD[31:0] = $HHHHLLLL, where LLLL are the two least
significant bytes of the first word written to the DTXM, and HHHH are the two least
significant bytes of the second word written to the DTXM.
6.5.3.4.2

If FC = $1:

The data written to the DTXM is output to the HAD31-HAD0 signals as right aligned
and zero extended in the most significant byte.
6.5.3.4.3

If FC = $2:

The data written to the DTXM is output to the HAD31-HAD0 signals as right aligned
and sign extended in the most significant byte.
6.5.3.4.4

If FC = $3:

The data written to the DTXM is output to the HAD31-HAD0 signals as left aligned and
zero filled in the least significant byte.
6.5.3.5

In a PCI Host-to-DSP Transaction:

6.5.3.5.1
If FC = $0 (32-bit data mode):
The two least significant bytes PCI data bytes from the HAD15-HAD0 signals are
transferred to the two least significant bytes of the DRXR after which the two most
significant bytes, from the HAD32-HAD16 signals, are transferred to the two least
significant bytes of the DRXR. Thus, when the DSP56300 core reads two words from the
DRXR, the two least significant bytes of the first word read contain the two least
significant bytes of the 32-bit word written to the HTXR, the two least significant bytes of
the second word read contain the two most significant bytes of the 32-bit word.
6.5.3.5.2
If FC = $1 or $2:
The three least significant PCI data bytes from the HAD23-HAD0 signals are transferred
to the DRXR to be read by the DSP56300 core.
MOTOROLA
DSP56305 User's Manual
HOST INTERFACE (HI32)
DSP SIDE Programming Model
6-31

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