Motorola DSP56305 User Manual page 245

Table 6-18 Host Port Signals - Detailed Description (Sheet 5 of 13)
HI32
Port
PCI
a
Pin
HLOCK
Lock
Sustained tri-state bidirectional
c
signal.
HLOCK
indicates an atomic
operation that may require multiple
transactions to complete. When
HLOCK
is asserted, non-exclusive
transactions to the HI32 will be
'retried' (i.e. this is an entire resource
lock).
HPAR
Parity
Tri-state, bidirectional signal.
Even parity across HAD31-HAD0 and
HC3/HBE3-HC0/HBE0. The master
drives HPAR during address and
write data phases; the target drives
HPAR during read data phases.
HI32 Mode
Enhanced Universal
HBS
(Bus Strobe)
Schmitt trigger input signal.
Asserted at the start of a bus cycle (for half of a clock cycle)
providing an "early bus start" signal. This enables the
HI32 to respond (HTA valid) earlier.
HBS should be forced or pulled up to Vcc if not used (e.g.
ISA bus).
HDAK
Host DMA Acknowledge
Schmitt trigger input signal.
HDAK indicates that the external DMA channel is
accessing the HI32. The HI32 is selected as a DMA device
if HDAK and HWR or HRD (in the double-strobe mode) or
HDAK and HDS (in the single-strobe mode) are asserted.
HDAK should be forced or pulled up to Vcc if not used.
b
Universal
GPIO
Disconnected