Table 10-1 Ex Bit Definition; Table 10-2 Go Bit Definition; Table 10-3 R/W Bit Definition; Register Select (Rs4–Rs0) Bits 0–4 - Motorola DSP56305 User Manual

On-Chip Emulation Module
OnCE Controller
10.4.1.1 Register Select (RS4–RS0) Bits 0–4
The Register Select bits define which register is source/destination for the read/write
operation. Table 10-4 shows the OnCE register addresses.
10.4.1.2

Exit Command (EX) Bit 5

If the EX bit is set, leave Debug mode and resume normal operation. The EXIT command
is executed only if the GO command is issued, and the operation is write to OPDBR or
read/write to "No Register Selected." Otherwise, the EX bit is ignored. Table 10-1 shows
the definition of the EX bit.
10.4.1.3

GO Command (GO) Bit 6

If the GO bit is set, execute the instruction that resides in the PIL register. To execute the
instruction, the core leaves the Debug mode. The core returns to the Debug mode
immediately after executing the instruction if the EX bit is cleared. The core goes on to
normal operation if the EX bit is set. The GO command is executed only if the operation
is write to OPDBR or read/write to "No Register Selected." Otherwise, the GO bit is
ignored. Table 10-2 shows the definition of the GO bit.
10.4.1.4

Read/Write Command (R/W) Bit 7

The R/W bit specifies the direction of data transfer.
R/W
0 Write the data associated with the command into the register specified by
RS4–RS0.
1 Read the data contained in the register specified by RS4–RS0.
10-6

Table 10-1 EX Bit Definition

EX Action
0 Remain in Debug mode
1 Leave Debug mode

Table 10-2 GO Bit Definition

GO Action
0 Inactive—no action taken
1 Execute instruction in PIL

Table 10-3 R/W Bit Definition

Action
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