Motorola DSP56305 User Manual page 647

24-bit digital signal processor
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HI32 Registers - Quick Reference (Sheet 5 of 8)
Reg
Bit #
Mnemonic Name
DRXR 23-
DSP Receive Data FIFO
0
DTXM 23-
DSP Master Transmit Data
0
FIFO
DTXS 23-
DSP Slave
0
Transmit Data FIFO
DATH 23-
DAT23-DAT
GPIO Signal Data
0
0
DIRH 23-
DIR23-DIR0 GPIO Signal Direction
0
Host Side
HCTR
TREQ
Transmit Request
Enable
RREQ
Receive Request Enable
HF2-HF0
Host Flags
DMAE
DMA Enable (ISA/EISA)
7
SFT
Slave Fetch Type
9-
HTF1-HTF0 Host Transmit Data Transfer
8
Format
12-
HRF1-HRF
Host Receive Data Transfer
11
0
Format
16-
HS2-HS0
Host Semaphores
14
19
TWSD
Target Wait State Disable
MOTOROLA
Val Function
[0]
Input
[1]
Output
0
HTRQ interrupt disabled
1
HTRQ interrupt enabled
0
HRRQ interrupt disabled
1
HRRQ interrupt enabled
0
HI32 does not support DMA
1
transfers
HI32 supports ISA-DMA type
transfers
0
Pre-fetch
1
Fetch
PCI UB
00
32 bit mode24 bit mode
01
3 LSBs2 Right, zero ext.
10
3 LSBs2 Right, sign ext.
11
3 MSbs2 Left, zero filled
PCI UB
00
32 bit mode24 bit mode
01
3 Right, zero ext.2 LSBs
10
3 Right, sign ext.2 LSBs
11
3 Left, zero filled2 middle bytes
0
HI32 target will insert up to 8
1
w.s.
HI32 target will not insert wait
states
DSP56305 User's Manual
PROGRAMMING REFERENCE
Comments
Reset Type
HS
PH
PS
empty
empty
empty
$000000 -
-
$000000 -
-
-
0
-
-
0
-
-
0
-
-
0
-
-
0
-
-
$0
-
-
$0
-
-
0
-
-
0
-
D-47

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