Motorola DSP56305 User Manual page 606

24-bit digital signal processor
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PROGRAMMING REFERENCE
Table D-1 Internal I/O Memory Map (Continued)
16-Bit
Peripheral
Address
$FFD7
$FFD6
$FFD5
$FFD4
$FFD3
$FFD2
$FFD1
$FFD0
$FFCF
$FFCE
$FFCD
$FFCC
$FFCB
$FFCA
PORT B
$FFC9
$FFC8
HI08
$FFC7
$FFC6
$FFC5
$FFC4
$FFC3
$FFC2
$FFC1
$FFC0
D-6
24-Bit
Address
$FFFFD7
Reserved
$FFFFD6
Reserved
$FFFFD5
Reserved
$FFFFD4
Reserved
$FFFFD3
Reserved
$FFFFD2
Reserved
$FFFFD1
Reserved
$FFFFD0
Reserved
$FFFFCF
Reserved
$FFFFCE
Reserved
$FFFFCD
Reserved
$FFFFCC
Reserved
$FFFFCB
Reserved
$FFFFCA
Reserved
$FFFFC9
Host Port GPIO Data Register (HDR)
$FFFFC8
Host Port GPIO Direction Register (HDDR)
$FFFFC7
Host Transmit Register (HTX)
$FFFFC6
Host Receive Register (HRX)
$FFFFC5
Host Base Address Register (HBAR)
$FFFFC4
Host Polarity Control Register (HPCR)
$FFFFC3
Host Status Register (HSR)
$FFFFC2
Host Control Register (HCR)
$FFFFC1
Reserved
$FFFFC0
Reserved
DSP56305 User's Manual
Register Name
MOTOROLA

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