Motorola DSP56305 User Manual page 648

24-bit digital signal processor
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PROGRAMMING REFERENCE
HI32 Registers - Quick Reference (Sheet 6 of 8)
Reg
Bit #
Mnemonic Name
HSTR
TRDY
HTRQ
HRRQ
HF5-HF3
HINT
HREQ
HCVR 0
HC
7-
HV6-HV0
1
15
HNMI
HRXM 31-
0
HRXS 31-
0
HTXR 31-
0
CVID
15-
VID15-VID0 Vendor ID
CDID
0
31-
DID15-DID0 Device ID
16
D-48
Transmitter Ready
Host Transmit Data Request 1
Host Receive Data Request 0
Host Flags
Host Interrupt A
Host Request
Host Command
Host Command Vector
Host Non Maskable Int. Req. 0
Host Master Receive Data
FIFO
Host Slave Receive Data
FIFO
Host Transmit Data FIFO
DSP56305 User's Manual
Val Function
1
transmit FIF O (6 deep) is
0
empty
transmit FIFO is not empty
host transmit FIFO is not full
0
host transmit FIFO is full
host receive FIFO is empty
1
host receive FIFO is not empty
0
HINTA signal is high
impedance
1
HINTA signal is driven low
0
HIRQ signal is deasserted
1
HIRQ signal is asserted (if
enabled)
0
no host command pending
1
host command pending
a maskable interrupt request
1
a non-maskable interrupt
request
$10
57
Comments
Reset Type
HS
PH
1
-
1
-
0
-
0
-
0
-
-
0
cleared when
-
-
the HC
interrupt
request is
serviced
default vector
-
default
via programm
vector
able
(Section
6.10)
-
0
empty
empty
empty
hardwired
-
-
$1057
via programm
-
-
able
(Section
6.10)
MOTOROLA
PS
1
1
0
-
-
-
0
-
-
-
-

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