Viterbi Trellis Setup Register (Vtsr); Initial State (Is[5:0])—Vtsr Bits 5–0; End State (Es[5:0])—Vtsr Bits 13–8; Reserved Bits—Vtsr Bits 6, 7, 14, 15 - Motorola DSP56305 User Manual

13.5.9

Viterbi Trellis Setup Register (VTSR)

The Viterbi Trellis Setup Register is a 16-bit register that determines the Initial State and
End State of the trellis diagram. The values of the VTSR bits are used together with the
values of ISE and FLC (VCRB, Bits 0 and 1).
15 14 13
ES5
Reserved bit, Read as zero, should be written with zero for future compatibility

Figure 13-14 Viterbi Trellis Setup Register (VTSR)

13.5.9.1 Initial State (IS[5:0])—VTSR Bits 5–0
The Initial State (IS[5:0]) bits define the starting state of the decoder or equalizer. The
state is selected by assigning the selected state a high path metric value during the
initialization stage. If ISE is cleared, all trellis states are equally weighted with the value
0. If ISE is set, the start state (defined by the IS[5:0] bits) is assigned an initial path metric
19
value of 2 . See Section 13.7 for a detailed description of trellis state formation.
13.5.9.2 End State (ES[5:0])—VTSR Bits 13–8
The End State bits (ES[5:0]) define a known ending state of the trellis diagram. During
Flush operation the path in the trellis diagram is chosen according to bit FLC. See
Section 13.7 for a detailed description on the trellis state formation.
13.5.9.3 Reserved Bits—VTSR Bits 6, 7, 14, 15
These bits are reserved and should be written with zero.

13.5.10 Viterbi Bit Error Rate Register/Counter (VBER)

The Viterbi Bit Error Rate Register/Counter (VBER) is used in the Decoder and the
Memory Access operation modes.
In Decoder mode, the VBER is a 16-bit read-only register containing the BER value. The
BER value is the number of symbol-bits corrected so far by the decoding process. The
register value is valid at the end of decoding.
In Memory Access mode, the VBER is a read/write address register/counter for
accessing memory modules of the VCOP. Bits 7–6 select the accessed RAM module
MOTOROLA
12 11 10 9
ES4 ES3 ES2 ES1 ES0
DSP56305 User's Manual
8 7 6 5 4
IS5 IS4
VITERBI CO-PROCESSOR
Programming Model
3 2 1 0
IS3 IS2 IS1 IS0
13-27
AA1323