Table 6-5 Host Port Signal Functionality; Dctr Reserved Control Bits 23, 12-7 - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
DSP SIDE Programming Model
6.5.1.14

DCTR Reserved Control Bits 23, 12-7

These bits are reserved for future expansion, they are read as zeros and should be
written with zeros for upward compatibility.
PCI Bus
HI32
Mode
Port
Pin
HM = $1
7-0 HAD15-HAD0
15-8
19-16 HC3/HBE3-HC0/HBE
0
20 HTRDY
21 HIRDY
22 HDEVSEL
23 HLOCK
24 HPAR
25 HPERR
26 HGNT
27 HREQ
28 HSERR
29 HSTOP
30 HIDSEL
31 HFRAME
32 HCLK
40-33 HAD23-HAD16
48-41 HAD31-HAD24
49 HRST
50
a. When operating with a host bus less than 24 bits wide, the data signals that are not used for
transferring data must be forced or pulled to Vcc or to GND.
b. Must be forced or pulled to Vcc or GND.
c. HBS/HDAK should be forced or pulled up to Vcc if not used.
d. Must be forced or pulled up to Vcc.
6-20

Table 6-5 Host Port Signal Functionality

Universal Bus Mode
Enhanced Universal
Bus Mode
HM = $3
HDBEN
H DBDR
HSAK
Output is high impedance if HRFπ$0.
Input is disconnected if HTFπ$0.
DSP56305 User's Manual
a
Universal Bus Mode
HM = $2
HA10-HA3
HD7-HD0
HA2-HA0
b
UNUSED
c
HBS
c
HDAK
HDRQ
HAEN
HTA
HIRQ
HWR/HRW
HRD/HDS
d
UNUSED
d
UNUSED
HD15-8
HD23-16
HRST
HINTA
GPIO
Mode
HM = $4
7-0
15-8
HIO18-16
HIO19
20
21
22
HIO23
disconnected
disconnected
MOTOROLA