Reserved Bits 8-23; Once Memory Breakpoint Logic; Figure 10-6 Once Memory Breakpoint Logic 0 - Motorola DSP56305 User Manual

On-Chip Emulation Module

OnCE Memory Breakpoint Logic

10.4.3.8

Reserved Bits 8-23

Bits 8–23 are reserved for future use. They are read as 0 and should be written with 0 for
future compatibility.
10.5 OnCE MEMORY BREAKPOINT LOGIC
Memory breakpoints can be set on program memory or data memory locations. In
addition, the breakpoint does not have to be in a specific memory address, but within an
approximate address range of where the program may be executing. This significantly
increases the programmer's ability to monitor what the program is doing in real-time.
The breakpoint logic, described in Figure 10-6, contains a latch for the addresses, which
are registers that store the upper and lower address limit, address comparators, and a
breakpoint counter.
TCK
TDO TDI
10-10
PAB XAB YAB
Memory Address Latch
Address Comparator 0
Memory Limit Register 0
Address Comparator 1
Memory Limit Register 1
Breakpoint Counter
Count = 0

Figure 10-6 OnCE Memory Breakpoint Logic 0

DSP56305 User's Manual
Memory Bus Select
TDI TCK
N,V
Breakpoint Control
Memory
N,V
Breakpoint
Selection
Breakpoint
Occurred
DEC
TDO
ISBKPT
AA0706
MOTOROLA