Table 2-10 Host Interface - Motorola DSP56305 User Manual

24-bit digital signal processor
Table of Contents

Advertisement

Signal Name
Type
HAD0–HAD7
Input/
Output
HA3–HA10
Input
PB0–PB7
Input or
Output
HAD8–
Input/
HAD15
Output
HD0–HD7
Input/
Output
PB8–PB15
Input or
Output
MOTOROLA

Table 2-10 Host Interface

State
During
Reset
Tri-stated
Host Address/Data 0–7—When the HI32 is
programmed to interface a PCI bus and the HI
function is selected, these signals are lines 0–7 of
the bidirectional, multiplexed Address/Data bus.
Host Address 3–10—When HI32 is programmed
to interface a universal non-PCI bus and the HI
function is selected, these signals are lines 3–10 of
the input Address bus.
Port B 0–7—When the HI32 is configured as GPIO
through the DCTR, these signals are individually
programmed as inputs or outputs through the
HI32 Data Direction Register (DIRH).
These inputs are 5 V tolerant.
Tri-stated
Host Address/Data 8–15—When the HI32 is
programmed to interface a PCI bus and the HI
function is selected, these signals are lines 8–15 of
the bidirectional, multiplexed Address/Data bus.
Host Data 0–7—When HI32 is programmed to
interface a universal non-PCI bus and the HI
function is selected, these signals are lines 0–7 of
the bidirectional Data bus.
Port B 8–15—When the HI32 is configured as
GPIO through the DCTR, these signals are
individually programmed as inputs or outputs
through the HI32 DIRH.
These inputs are 5 V tolerant.
DSP56305 User's Manual
Signal/Connection Descriptions
Host Interface (HI32)
Signal Description
2-19

Advertisement

Table of Contents
loading

Table of Contents