Motorola DSP56305 User Manual page 31

24-bit digital signal processor
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JTAG Instruction Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-7
JTAG ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-10
Bypass Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11-12
Filter Co-Processor Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 12-5
FCOP Control/Status Register (FCSR) . . . . . . . . . . . . . . . . . . . . . 12-10
without Decimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-18
with Decimation by 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-20
Outputs Only with Decimation by 2 . . . . . . . . . . . . . . . . . . . . . . . . 12-22
without Decimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-24
without Decimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-26
with Decimation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12-28
Figure 12-9
Input /Output Stream for Complex FIR Filter Generating Pure Real/
Figure 12-10
Input /Output Stream for Complex FIR Filter Generating Pure Real/
Non-Oversampled Data without Decimation . . . . . . . . . . . . . . . . . 12-36
2× Oversampled Data without Decimation . . . . . . . . . . . . . . . . . . 12-39
Ungerboeck Form of MLSE Channel Equalizer. . . . . . . . . . . . . . . . 13-4
MOTOROLA
DSP56305 User's Manual
xxix

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