Off-Chip Memory Expansion; Internal Buses - Motorola DSP56305 User Manual

1.6.7

Off-Chip Memory Expansion

Memory can be expanded off-chip as follows:
• Data memory can be expanded to two 16 M × 24-bit word memory spaces in
24-bit Address mode (64 K in 16-bit Address mode)
• Program memory can be expanded to one 16 M × 24-bit word memory space in
24-bit Address mode (64 K in 16-bit Address mode)
Other features of external memory expansion include the following:
• External memory expansion port
• Chip-select logic glueless interface to Static Random Access Memory (SRAM)
• On-Chip DRAM controller for glueless interface to Dynamic Random Access
Memory (DRAM)
• Twenty-four external address lines
1.7

INTERNAL BUSES

To provide data exchange between blocks, the following buses are implemented:
• Peripheral I/O Expansion Bus (PIO_EB) to peripherals
• Program Memory Expansion Bus (PM_EB) to Program ROM
• X Memory Expansion Bus (XM_EB) to X memory
• Y Memory Expansion Bus (YM_EB) to Y memory
• Global Data Bus (GDB) between Program Control Unit and other core structures
• Program Data Bus (PDB) for carrying program data throughout the core
• X Memory Data Bus (XDB) for carrying X data throughout the core
• Y Memory Data Bus (YDB) for carrying Y data throughout the core
• Program Address Bus (PAB) for carrying program memory addresses throughout
the core
• X Memory Address Bus (XAB) for carrying X memory addresses throughout the
core
• Y Memory Address Bus (YAB) for carrying Y memory addresses throughout the
core
MOTOROLA DSP56305 User's Manual
DSP56305 Overview
Internal Buses
1-13