Interrupt Register (Ir, Timer0: T0Ir - 0Xe000 4000 And Timer1: T1Ir - 0Xe000 8000); Timer Control Register (Tcr, Timer0: T0Tcr - 0Xe000 4004 And Timer1: T1Tcr - 0Xe000 8004); User Manual - Philips LPC2101 User Manual

Table of Contents

Advertisement

Philips Semiconductors
Volume 1
Table 165: TIMER/COUNTER0 and TIMER/COUNTER1 register map
Generic
Description
Name
EMR
External Match Register. The EMR controls the
external match pins MAT0.2.0 and MAT1.3.0.
Note: MAT0.3 is not connected to a pin on
LPC2101/02/03.
CTCR
Count Control Register. The CTCR selects between
Timer and Counter mode, and in Counter mode
selects the signal and edge(s) for counting.
PWMCON PWM Control Register. The PWMCON enables
PWM mode for the external match pins MAT0.3.0
and MAT1.3.0.
[1]
15.5.1 Interrupt Register (IR, TIMER0: T0IR - 0xE000 4000 and TIMER1: T1IR
- 0xE000 8000)
The Interrupt Register consists of four bits for the match interrupts and four bits for the
capture interrupts. If an interrupt is generated then the corresponding bit in the IR will be
HIGH. Otherwise, the bit will be LOW. Writing a logic one to the corresponding IR bit will
reset the interrupt. Writing a zero has no effect.
Table 166: Interrupt Register (IR, TIMER0: T0IR - address 0xE000 4000 and TIMER1: T1IR - address 0xE000 8000) bit
description
Bit
Symbol
0
MR0 Interrupt
1
MR1 Interrupt
2
MR2 Interrupt
3
MR3 Interrupt
4
CR0 Interrupt
5
CR1 Interrupt
6
CR2 Interrupt
7
CR3 Interrupt
15.5.2 Timer Control Register (TCR, TIMER0: T0TCR - 0xE000 4004 and
TIMER1: T1TCR - 0xE000 8004)
The Timer Control Register (TCR) is used to control the operation of the Timer/Counter.

User manual

Reset value reflects the data stored in used bits only. It does not include reserved bits content.
Description
Interrupt flag for match channel 0.
Interrupt flag for match channel 1.
Interrupt flag for match channel 2.
Interrupt flag for match channel 3.
Interrupt flag for capture channel 0 event.
Interrupt flag for capture channel 1 event.
Interrupt flag for capture channel 2 event.
Interrupt flag for capture channel 3 event.
Note: CAP0.3 not usable on Timer 0
Rev. 01 — 12 January 2006
Chapter 15: Timer0 and Timer1
Access Reset
TIMER/
[1]
value
COUNTER0
Address &
Name
R/W
0
0xE000 403C
T0EMR
R/W
0
0xE000 4070
T0CTCR
R/W
0
0xE000 4074
PWM0CON
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
UM10161
TIMER/
COUNTER1
Address &
Name
0xE000 803C
T1EMR
0xE000 8070
T1CTCR
0xE000 8074
PWM1CON
Reset value
0
0
0
0
0
0
0
0
190

Advertisement

Table of Contents
loading

This manual is also suitable for:

Lpc2103Lpc2102

Table of Contents