User Manual - Philips LPC2101 User Manual

Philips Semiconductors
Volume 1

User manual

MATCH REGISTER 0
MATCH REGISTER 1
MATCH REGISTER 2
MATCH REGISTER 3
MATCH CONTROL REGISTER
EXTERNAL MATCH REGISTER
INTERRUPT REGISTER
CONTROL
MAT[3:0]
INTERRUPT
CAP[3:0]
STOP ON MATCH
RESET ON MATCH
LOAD[3:0]
CAPTURE CONTROL REGISTER
CAPTURE REGISTER 0
CAPTURE REGISTER 1
CAPTURE REGISTER 2
CAPTURE REGISTER 3
TIMER CONTROL REGISTER
(1) The capture register 3 (CAP0.3) is not available on TIMER0.
Fig 52. Timer0/1 block diagram
Rev. 01 — 12 January 2006
CSN
(1)
reset enable
UM10161
Chapter 15: Timer0 and Timer1
=
=
=
=
TIMER COUNTER
CE
TCI
PCLK
PRESCALE COUNTER
MAXVAL
PRESCALE REGISTER
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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