System Control And Status Flags Register (Scs - 0Xe01F C1A0); Memory Mapping Control; Memory Mapping Control Register (Memmap - 0Xe01F C040); Memory Mapping Control Usage Notes - Philips LPC2101 User Manual

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3.6.1 System Control and Status flags register (SCS - 0xE01F C1A0)

Table 13: System Control and Status flags register (SCS - address 0xE01F C1A0) bit description
Bit Symbol Value
0 GPIO0M
0
1
31:1 -

3.7 Memory mapping control

The Memory Mapping Control alters the mapping of the interrupt vectors that appear
beginning at address 0x0000 0000. This allows code running in different memory spaces
to have control of the interrupts.

3.7.1 Memory Mapping control register (MEMMAP - 0xE01F C040)

Whenever an exception handling is necessary, the microcontroller will fetch an instruction
residing on the exception corresponding address as described in
vector locations" on page
will fill this table.
Table 14:
Bit
1:0
7:2

3.7.2 Memory mapping control usage notes

The Memory Mapping Control simply selects one out of three available sources of data
(sets of 64 bytes each) necessary for handling ARM exceptions (interrupts).
User manual
Description
GPIO port 0 mode selection.
GPIO port 0 is accessed via APB addresses in a fashion compatible with previous
LCP2000 devices.
High speed GPIO is enabled on GPIO port 0, accessed via addresses in the on-chip
memory range. This mode includes the port masking feature described in the GPIO
chapter on page Section 8.4.2 "Fast GPIO port 0 Mask register (FIOMASK, Port 0:
FIO0MASK - 0x3FFF C010)" on page
Reserved, user software should not write ones to reserved bits. The value read from
a reserved bit is not defined.
12. The MEMMAP register determines the source of data that
Memory Mapping control register (MEMMAP - address 0xE01F C040) bit
description
Symbol Value Description
MAP 00 Boot Loader Mode. Interrupt vectors are re-mapped to Boot
Block.
01 User Flash Mode. Interrupt vectors are not re-mapped and
reside in Flash.
10 User RAM Mode. Interrupt vectors are re-mapped to Static
RAM.
11 Reserved. Do not use this option.
Warning: Improper setting of this value may result in incorrect
operation of the device.
- - Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Rev. 01 — 12 January 2006
Chapter 3: System control block
74.
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
UM10161
Reset
value
0
NA
Table 3 "ARM exception
Reset
value
00
NA
23