User Manual - Philips LPC2101 User Manual

Philips Semiconductors
Volume 1
; /*********************************************************************
; * Setup Vectored Interrupt controller. DCC Rx and Tx interrupts
; * generate Non Vectored IRQ request. rm_init_entry is aware
; * of the VIC and it enables the DBGCommRX and DBGCommTx interrupts.
; * Default vector address register is programmed with the address of
; * Non vectored app_irqDispatch mentioned in this example. User can setup
; * Vectored IRQs or FIQs here.
; *********************************************************************/
; /*********************************************************************
; * Get the address of the User entry point.
; *********************************************************************/
; /*********************************************************************
; * Non vectored irq handler (app_irqDispatch)
; *********************************************************************/
AREA app_irqDispatch, CODE
VICVectAddrOffset EQU 0x30
app_irqDispatch
;User should insert code here if non vectored Interrupt sharing is
;required. Each non vectored shared irq handler must return to
;the interrupted instruction by using the following code.
;
;
;
;
;
;
;

User manual

VICBaseAddr EQU 0xFFFFF000 ; VIC Base address
VICDefVectAddrOffset EQU 0x34
LDR r0, =VICBaseAddr
LDR r1, =app_irqDispatch
STR r1, [r0,#VICDefVectAddrOffset]
BL rm_init_entry ;Initialize RealMonitor
;enable FIQ and IRQ in ARM Processor
MRS r1, CPSR ; get the CPSR
BIC r1, r1, #0xC0 ; enable IRQs and FIQs
MSR CPSR_c, r1 ; update the CPSR
LDR lr, =User_Entry
MOV pc, lr
;enable interrupt nesting
STMFD sp!, {r12,r14}
MRS r12, spsr
MSR cpsr_c,0x1F
MSR cpsr_c, #0x52
MSR spsr, r12
STMFD sp!, {r0}
LDR r0, =VICBaseAddr
STR r1, [r0,#VICVectAddrOffset]
LDMFD sp!, {r12,r14,r0}
SUBS pc, r14, #4
;user interrupt did not happen so call rm_irqhandler2. This handler
;is not aware of the VIC interrupt priority hardware so trick
;rm_irqhandler2 to return here
Rev. 01 — 12 January 2006
;Save SPSR in to r12
;Re-enable IRQ, go to system mode
;Disable irq, move to IRQ mode
;Restore SPSR from r12
;Acknowledge Non Vectored irq has finished
;Restore registers
;Return to the interrupted instruction
UM10161
Chapter 21: RealMonitor
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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