Bus Description; Texas Instruments Synchronous Serial (Ssi) Frame Format; User Manual - Philips LPC2101 User Manual

Philips Semiconductors
Volume 1
Table 146: SSP pin descriptions
Interface pin name/function
Pin Name Type
SPI
SSEL1 I/O SSEL
MISO1 I/O MISO
MOSI1 I/O MOSI

13.3 Bus description

13.3.1 Texas Instruments Synchronous Serial (SSI) frame format

Figure 41
by the SSP module.

User manual

SSI Microwire
FS CS
DR(M) SI(M)
DX(S) SO(S)
DX(M) SO(M)
DR(S) SI(S)
show the 4-wire Texas Instruments synchronous serial frame format supported
Rev. 01 — 12 January 2006
Pin Description
Slave Select/Frame Sync/Chip Select. When the SSP is a
bus master, it drives this signal from shortly before the start
of serial data, to shortly after the end of serial data, to signify
a data transfer as appropriate for the selected bus and
mode. When the SSP is a bus slave, this signal qualifies the
presence of data from the Master, according to the protocol
in use. When there is just one bus master and one bus
slave, the Frame Sync or Slave Select signal from the
Master can be connected directly to the slave's
corresponding input. When there is more than one slave on
the bus, further qualification of their Frame Select/Slave
Select inputs will typically be necessary to prevent more
than one slave from responding to a transfer.
Master In Slave Out. The MISO signal transfers serial data
from the slave to the master. When the SSP is a slave, serial
data is output on this signal. When the SSP is a master, it
clocks in serial data from this signal. When the SSP is a
slave and is not selected by SSEL, it does not drive this
signal (leaves it in HIGH impedance state).
Master Out Slave In. The MOSI signal transfers serial data
from the master to the slave. When the SSP is a master, it
outputs serial data on this signal. When the SSP is a slave, it
clocks in serial data from this signal.
UM10161
Chapter 13: SSP
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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