Code Read Protection (Crp); Isp Commands; User Manual - Philips LPC2101 User Manual

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Philips Semiconductors
Volume 1

19.7 Code Read Protection (CRP)

Code read protection is enabled by programming the flash address location 0x1FC (User
flash sector 0) with value 0x8765 4321 (2271560481 Decimal). Address 0x1FC is used to
allow some room for the FIQ exception handler. When the code read protection is enabled
the JTAG debug port, external memory boot and the following ISP commands are
disabled:
The ISP commands mentioned above terminate with return code
CODE_READ_PROTECTION_ENABLED. The ISP erase command only allows erasure
of all user sectors when the code read protection is enabled. This limitation does not exist
if the code read protection is not enabled. IAP commands are not affected by the code
read protection.
Important: CRP is active/inactive once the device has gone through a power cycle.

19.8 ISP commands

The following commands are accepted by the ISP command handler. Detailed status
codes are supported for each command. The command handler sends the return code
INVALID_COMMAND when an undefined command is received. Commands and return
codes are in ASCII format.
CMD_SUCCESS is sent by ISP command handler only when received ISP command has
been completely executed and the new ISP command can be given by the host.
Exceptions from this rule are "Set Baud Rate", "Write to RAM", "Read Memory", and "Go"
commands.
Table 209: ISP command summary
ISP Command
Unlock
Set Baud Rate
Echo
Write to RAM
Read Memory
Prepare sector(s) for
write operation
Copy RAM to Flash
Go
Erase sector(s)
Blank check sector(s)

User manual

Read Memory
Write to RAM
Go
Copy RAM to Flash
Usage
U <Unlock Code>
B <Baud Rate> <stop bit>
A <setting>
W <start address> <number of bytes>
R <address> <number of bytes>
P <start sector number> <end sector number>
C <Flash address> <RAM address> <number of bytes>
G <address> <Mode>
E <start sector number> <end sector number>
I <start sector number> <end sector number>
Rev. 01 — 12 January 2006
UM10161
Chapter 19: Flash memory
Described in
Table 210
Table 211
Table 213
Table 214
Table 215
Table 216
Table 217
Table 218
Table 219
Table 220
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
235

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