Chapter 15: Timer/Counter Timer0 And Timer1; Features; Applications; Description - Philips LPC2101 User Manual

Timer/Counter0 and Timer/Counter1 are functionally identical except for the peripheral
base address.

15.1 Features

15.2 Applications

15.3 Description

The Timer/Counter is designed to count cycles of the peripheral clock (PCLK) or an
externally-supplied clock, and it can optionally generate interrupts or perform other actions
at specified timer values, based on four match registers. It also includes four capture
inputs to trap the timer value when an input signal transitions, optionally generating an
interrupt.
Due to the limited number of pins on the LPC2101/02/03, only three of the Capture Inputs
and three of the Match Ouputs of Timer 0 are connected to device pins.

User manual

UM10161

Chapter 15: Timer/Counter Timer0 and Timer1

Rev. 01 — 12 January 2006
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32-bit Timer/Counter with a programmable 32-bit Prescaler
•
Counter or Timer operation
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Up to four (Timer1) and three (Timer0) 32-bit capture channels that can take a
snapshot of the timer value when an input signal transitions. A capture event may also
optionally generate an interrupt.
•
Four 32-bit match registers that allow:
– Continuous operation with optional interrupt generation on match.
– Stop timer on match with optional interrupt generation.
– Reset timer on match with optional interrupt generation.
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Up to four (Timer1) and three (Timer0) external outputs corresponding to match
registers with the following capabilities:
– Set LOW on match.
– Set HIGH on match.
– Toggle on match.
– Do nothing on match.
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For each timer, up to four match registers can be configured as PWM allowing to use
up to three match outputs as single edge controlled PWM ouputs.
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Interval Timer for counting internal events
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Pulse Width Demodulator via Capture inputs
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Free running timer
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Pulse Width Modulator via Match outputs
Rev. 01 — 12 January 2006
User manual
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
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