Toshiba GR200 Series Instruction Manual page 300

Centralized busbar protection ied
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signal monitoring points of the binary output circuits. The user can monitor the operations of
the binary output circuit using element ID together with function ID. When we assume that
BIO5A module is at IO#2 slot in the IED case, and if the user wishes to monitor the first-circuit
in the BIO5A module, the user can see the operation using the element ID (8002001112) and
the function ID† of IO#2 slot.
†Note: A function ID identifies every IO slots. For example, with regard to the function
ID and the Data ID at IO#1 slot, see section 4.4.9(i). On the other hand, for IO#2
slot see section 4.4.9(ii).
CPL switch
(i)
When the user needs to operate the CPL for binary output circuit #1, the user should set On
for the scheme switch [BO1_CPL]. Conversely, the user should set Off for the scheme switch
[BO1_CPL] if CPL is not required. Since all binary output circuits have CPLs setting between
On and Off is required for every binary output circuit. The number of CPL is equal to the
number of binary output circuits: that is, the number of CPLs is 9 in BIO5. Note that the
subsequent PLC settings described later require that Off be set for the scheme switch.
Selection of input signals
(ii)
Since a binary input circuit is operated by commands introduced from other functions, eight
ports for input signals are provided, designated as
input-signal1
must ensure that
the user can select input-signals that are available from other functions, these input-signals
are designated using DataIDs. The user can key the DataIDs into settings [Input signal1] to
[Input signal8]. The DataIDs are selected from the
provided for every function.
Logic gate switch
(iii)
A binary input circuit has a logic scheme for the eight input signals, and can combine the eight
input signals as required using scheme switch [LOGIC-SW] for which the user should set either
AND, OR or XOR.
Delayed pick-up/delayed drop-off signal
(iv)
An on-delay timer and an off-delay timer are provided in the CPL; both are used to adjust the
timing for binary output circuits, the user should set their respective time values for settings
[On Delay Timer] and [Off Delay Timer].
Logic level inversion
(v)
The logic inversion function can invert the input signal for each binary output circuit; the user
input-signal1
input-signal8
to
are configured with eight DataIDs. That is,
- 286 -
6F2S1931 (0.20)
input-signal8
to
Signal monitoring point
Centralized GRB200
(Soft: 030, 031, 032, 033, 034)
. The user
list, which is

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