Toshiba GR200 Series Instruction Manual page 487

Supervision of FPGA (FPGA error)
9.2.6
Detecting the error in the FPGA is achieved when the CPU module detects fatal failures.
Error level
(i)
The error level is set at level 1 (Serious error
FPGA is carried out at any time. If the error is detected, the IED begins to restart its operation
automatically. Clearing the error message is made promptly when the error is cleared.
Error message
(ii)
When detecting an error, an error message can be shown on the LCD screen and an LED is lit.
Table 9.2-12 Error messages provided by the supervisor in CHK_FPGA
Message and level
CP*_ (FPAG) error
Error level
Table 9.2-13 Detailed information in Hexadecimal in CHK_FPGA
Display
area
Top
00000004: FPGA mode
row
Middle
(No information displayed)
row
Bottom
(No information is displayed)
row
Problem detected in the FPGA on the following module
instructed with "CP*_" as follows:
CP1M:
Serious error (Level 1)
Meaning of the detailed information
Left column
- 473 -
) for the supervision; checking errors on the
1
Meaning of the information
CPU module
Right column
00000008: FPAG interruption process
(No information displayed)
(No information is displayed)
6F2S1931 (0.20)
Centralized GRB200
(Soft: 030, 031, 032, 033, 034)