Toshiba GR200 Series Instruction Manual page 582

Both of Figure 10.3-30 and Figure 10.3-31 show a default PLC logic for quality signal (U16_00).
The PLC logic is combined with blocks A to E. As default, the block A contains different
functions—such as Id and CT errors, etc.—for each software model. Table 10.3-8 shows the
combination of each software:
 A Judging validities coming from the automatic supervision function
 B Collection and exclusion logics of the judgements results
 C Generator logic of U16_00 quality bit
 D Generator logic of U16_01 quality bit
 E Test bit generator.
Table 10.3-8 Default combinations of block A parts
Judgements of validities
Part# Error names (FB names)
A-1
Id error (CHK_ID_CBP)
A-2
CT error (CHK_CT_CBP)
A-3
A-4
A-5
AI error(CHK_AD_CBP)
A-6
A-7
A-8
A-9
A-10
A-11
SA error(CHK_SA_CBP)
A-12
A-13
A-14
A-15
V2 error (CHK_V2_CBP)
A-16
V0 error (CHK_VZ_CBP)
A-17
CT fail (CHK_CTF_CBP)
Both the figures are summarized into ○
 ○
 ○
 ○
 ○
 ○
 ○
 ○
 ○
 ○
 ○
10
 ○
11
 ○
12
 ○
13
to ○
1
an monitoring result of an automatic supervision function
1
an error level set by each automatic supervision function
2
Detection of the absence of an error level which is set
3
Judgement if Serious error or Serious error(Comm) is occurring
4
Judgement of Invalid state
5
Judgement for state of Questionable
6
Data type conversion
7
Collection and combination of Invalid states
8
Collection and combination of Questionable states
9
Exclusion of Invalid and Questionable state (i.e. priority of Invalid)
To shift Invalid bit 14 times in the left
To shift a questionable bit 15 times in the left
To shift a badReference bit 9 times in the left
- 568 -
Software models
30 31 32
  
  
  
  
NA
 
NA
 
NA
 
detail logic parts.
20
6F2S1931 (0.20)
33 34
 
 
 
 
NA

NA

NA

Centralized GRB200
(Soft: 030, 031, 032, 033, 034)