Mitsubishi Electric Q26UD(E)HCPU User Manual page 335

Error
Error and cause
code
[SP.UNIT LAY ERR.]
• Two or more QI60/A1SI61/AI61(-S1) modules
are mounted in a single CPU system.
• Two or more QI60/A1SI61/AI61(-S1) modules
are set to the same control CPU in a multiple
CPU system.
• Two or more A1SI61/AI61(-S1) modules are
loaded in a multiple CPU system.
■Collateral information
• Common information: Module No. (Slot No.)
• Individual information: -
■Diagnostic timing
• At power-on/At reset
[SP.UNIT LAY ERR.]
Two or more QI60, A1SI61 interrupt modules have
been mounted.
■Collateral information
• Common information: Module No. (Slot No.)
• Individual information: -
■Diagnostic timing
• At power-on/At reset
[SP.UNIT LAY ERR.]
Two or more QI60 modules are mounted.
2103
■Collateral information
• Common information: Module No. (Slot No.)
• Individual information: -
■Diagnostic timing
• At power-on/At reset
[SP.UNIT LAY ERR.]
Two or more QI60 modules where interrupt pointer
setting has not been made are mounted.
■Collateral information
• Common information: Module No. (Slot No.)
• Individual information: -
■Diagnostic timing
• At power-on/At reset
[SP.UNIT LAY ERR.]
• An interrupt pointer set in built-in I/O function
setting parameter and the interrupt pointer for
the A1SI61 are overlapping.
• Two or more A1SI61 modules are mounted.
■Collateral information
• Common information: Module No. (Slot No.)
• Individual information: -
■Diagnostic timing
• At power-on/At reset
Corrective action
• Mount only one QI60/A1SI61/AI61(-S1)
module in the single CPU system.
• Mount only one A1SI61/AI61(-S1) module
in the single CPU system, and set an
interrupt pointer to the QI60.
• Control only one QI60/A1SI61/AI61(-S1)
module by the control CPU module in the
multiple CPU system.
• Mount only one A1SI61/AI61(-S1) module
in the multiple CPU system.
Reduce the number of QI60 and A1SI61
modules to one each.
Mount only one QI60 module.
• Mount only one QI60 module.
• Set an interrupt pointer to the second QI60
module and later.
• Set interrupt pointers so that they do not
overlap.
• Mount only one A1SI61 module.
APPENDICES
LED status, Corresponding
CPU status CPU
Qn(H)
QnPH
QnU
Qn(H)
QnPRH
RUN: Off
ERR.:Flashing
CPU Status:Stop Q00J/Q00/Q01
Q00J/Q00/Q01
QnU
LCPU
A
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