Mitsubishi Electric Q26UD(E)HCPU User Manual page 519

Melsecq series
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Number
Name
Meaning
Continuation
Continuation
SD81
error cause
error cause
Continuation
Continuation
SD82
error cause
error cause
SD84
Continuation
Continuation
error clear
error clear
SD85
SD90
SD91
SD92
Step
SD93
transition
monitoring
F number for
SD94
timer setting
timer set
value
value and
(Enabled
time over
SD95
only when
error
SFC program
SD96
exists)
SD97
SD98
SD99
Explanation
This register stores a continuation error cause.
b15
b12
b11
b8
b7
b4
b3
SD81
• QnUDVCPU: The b9 is fixed to 0.
• LCPU: The b14 and b15 are fixed to 0.
This register stores a continuation error cause.
b15
b12
b11
b8
b7
b4
b3
SD82
(3)
(1)UNIT VERIFY ERR.
(2)MULTI CPU ERROR
(3)Fixed to 0
• LCPU: All bits are fixed to 0.
This register stores a continuation error cause.
b15
b12
b11
b8
b7
b4
b3
SD82
(4)
(1)UNIT VERIFY ERR.
(2)MULTI CPU ERROR
(3)PID ERROR
(4)Fixed to 0
• LCPU: The b0 and b1 are fixed to 0.
This register stores a continuation error to be cleared in bit
pattern.
For the LCPU, all bits are empty.
Corresponds to
SM90
• This register stores a value set for step
Corresponds to
transition monitoring timer and the
SM91
number of an annunciator (F) that
Corresponds to
turns on if the monitoring timer times
SM92
out.
Corresponds to
SM93
b15
to
Corresponds to
SM94
F number setting
Corresponds to
(0 to 255)
SM95
Corresponds to
• Turning on any of SM90 to SM99 while
SM96
a step is running will start the timer,
Corresponds to
and if the transition condition for the
SM97
step next to the active step is not met
Corresponds to
within the timer limit, the set
SM98
annunciator (F) turns on.
Corresponds to
SM99
Set by
(When Set)
b0
SP.UNIT DOWN
AC/DC DOWN
BATTERY ERROR
FLASH ROM ERROR
SP.UNIT ERROR
ICM.OPE.ERROR
FILE OPE.ERROR
S (Error)
REMOTE PASS.FAIL
SNTP OPE.ERROR
DISPLAY ERROR
OPERATION ERROR
PRG.TIME OVER
F***(Annunciator)
FUSE BREAK OFF
SINGLE PS.DOWN
SINGLE PS.ERROR
b0
(2)
(1)
S (Error)
b0
(3)
(2)
(1)
U
b8
b7
to
b0
Timer time limit
U
setting
(1 to 255s:
(1s units))
APPENDICES
Corresponding
Corresponding
ACPU
CPU
D9
QnUDV
New
LCPU
*10
QnUDV
*10
LCPU
New
*9
QnUDV
*9
LCPU
QnUDV
New
LCPU
D9108
D9109
D9110
D9111
D9112
Qn(H)
QnPH
QnPRH
D9113
D9114
New
517
A

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