Mitsubishi Electric Q26UD(E)HCPU User Manual page 542

Melsecq series
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Number
Name
Meaning
Drive 3/4
Drive 3/4
SD620
types
types
Drive 3
(Standard
Drive 3
SD622
RAM)
capacity
capacity
Drive 4
(Standard
Drive 4
SD623
ROM)
capacity
capacity
Drive 3/4
Drive 3/4 use
SD624
use
conditions
conditions
540
Explanation
This register stores the usage status of drives 3 and 4 in the
following bit pattern.
b15
to
b8 b7
to
b4 b3
to
0
Drive 3
(Standard
RAM) type
Drive 4
(Standard
ROM) type
This register stores the usage status of drives 3 and 4 in the
following bit pattern.
to
to
b4
to
b15
b8
b7
b3
0
Drive 3
(Standard
RAM) type
Drive 4
(Standard
ROM) type
*1
For the Q00UJCPU, the drive 3 (Standard RAM) type is
fixed at "0".
This register stores the drive 3 storage capacity (unit: 1K
byte).
This register stores the drive 3 storage capacity (unit: 1K
byte). (Free space value after formatting is stored.)
This register stores the drive 4 storage capacity (unit: 1K
byte).
This register stores the drive 4 storage capacity (unit: 1K
byte). (Free space value after formatting is stored.)
This register stores the usage status of the drives 3 and 4 in
the following bit pattern.
to
to
b15
b5
b4
b0
0
0
0
0
0
This register stores the usage status of the drives 3 and 4 in
the following bit pattern. (Each bit is on while the
corresponding drive is being used.)
b0 : Boot operation (QBT)
b8 : Not used
b1 : Parameters (QPA)
b9 : Error history (QFD)
b10 : SFC trace (QTS)
b2 : Device comments (QCD)
b3 : Device initial value (QDI)
b11 : Local device (QDL)
b4 : File register (QDR)
b12 : Not used
b5 : Sampling trace (QTD)
b13 : Not used
b6 : Not used
b14 : Not used
b7 : Not used
b15 : Not used
Set by
(When Set)
b0
0: Absent
1: Present
"3 (FLASH ROM)"
S (Initial)
b0
Fixed to 1
*1
Fixed to 3
S (Initial)
S (Initial)
0
Boot operation (QBT)
0: Not used
1: In use
File register (QDR)
0: Not used
1: In use
S (Status
change)
Corresponding
Corresponding
ACPU
CPU
D9
Q00J/Q00/Q01
New
Qn(H)
QnPH
QnPRH
QnU
LCPU
Q00J/Q00/Q01
Qn(H)
New
QnPH
QnPRH
QnU
LCPU
Q00J/Q00/Q01
Qn(H)
New
QnPH
QnPRH
QnU
LCPU
Q00J/Q00/Q01
New
Qn(H)
QnPH
QnPRH

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