Port 0 Registers - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 9 I/O PORT
9.2.1

Port 0 Registers

This section describes the port 0 registers.
Port 0 Register Function
Table 9.2-2 lists the port 0 register functions.
Table 9.2-2 Port 0 Register Function
Register
Data
name
0
PDR0
1
0
DDR0
1
0
PUL0
1
0
AIDRL
1
0
ILSR2
1
Table 9.2-3 lists the correspondence between port 0 pins and each register bit.
Table 9.2-3 Correspondence Between Registers and Pins for Port 0
Pin name P07
PDR0 bit7
DDR0
AIDRL
PUL0
-
ILSR2
bit0
106
Read
Pin state is "L" level.
Pin state is "H" level.
Correspondence between related register bits and pins
P06 P05
bit6 bit5
- bit5
bit0 bit0
Read read-modify-write
PDR value is "0".
PDR value is "1".
Port input enabled
Port output enabled
Pull-up disabled
Pull-up enabled
Analog input enabled
Port input enabled
Hysteresis input level
Automotive input level
P04 P03 P02
bit4 bit3 bit2
bit4 bit3 bit2
bit0 bit0 bit0
Write
As output port, outputs
"L" level.
As output port, outputs
"H" level.
P01 P00
bit1 bit0
bit1 bit0
bit0 bit0