Fujitsu F2MC-8FX Hardware Manual page 28

CHAPTER 1 DESCRIPTION
Table 1.7-1 Pin Description (2 / 3)
Pin no.
Pin name
1
LQFP*
16 V
17 V
CC
18 C
19 P95/X1A
20 P94/X0A
21 RST
22 P50/SCL0
23 P51/SDA0
24 PA0/COM0
25 PA1/COM1
26 PA2/COM2
27 PA3/COM3
PB0/S00/TP-
28
CLK/CALPL
29 PB1/S01
30 PB2/S02
31 PB3/S03
32 PB4/S04
33 PB5/S05
34 PB6/S06
35 PB7/S07
36 PC0/S08/TRG0
37 PC1/S09/TRG1
38 PC2/S10/TRG2
39 PC3/S11/TRG3
40 PC4/S12/TRG4
41 PC5/S13/TRG5
42 PC6/S14/TRG6
43 PC7/S15/TRG7
14
I/O
circuit
2
type*
⎯
Power supply pin (GND)
SS
⎯
Power supply pin
⎯
Capacitor connection pin
General-purpose I/O port
A/H
The pins are shared with sub clock oscillation pin
B'
Reset pin
General-purpose I/O port
The pin is shared with I
I
General-purpose I/O port
The pin is shared with I
General-purpose I/O port
M
The pins are shared with LCDC COM output.
General-purpose I/O port
M
The pins are shared with LCDC SEG output and RTC I/O.
General-purpose I/O port
The pins are shared with LCDC SEG output.
M
General-purpose I/O port
The pins are shared with LCDC SEG output and PPG trigger input.
General-purpose I/O port
M
The pins are shared with LCDC SEG output and PPG trigger input.
Function
2
C ch.0 clock I/O.
2
C ch.0 data I/O.