Fujitsu F2MC-8FX Hardware Manual page 416

2
CHAPTER 22 I C
The following sample flowchart illustrates the procedure:
Set the MSS bit in I
Example of generating an interrupt (IBCR10:INT bit = 1) with "IBCR00:ALF bit = 1" detected
If a start condition is generated by the program (by setting the IBCR10:MSS bit to "1") with the bus busy
(IBSR0:BB bit = 1) and arbitration lost detected, a IBCR10:INT bit interrupt occurs upon detection of
"IBCR00:ALF bit = 1".
Figure 22.7-6 Timing Diagram with Interrupt Generated with "IBCR00:ALF Bit = 1" Detected
SCL0 pin
SDA0 pin
ICCR0:EN bit
IBCR10:MSS bit
IBCR00:ALF bit
IBSR0:BB bit
IBCR10:INT bit
402
Figure 22.7-5 Sample Flowchart
Enable AL interrupts (IBCR00:ALE = "1").
Set master mode.
2
C bus control register 1 (IBCR10) to "1".
IBCR00:ALF = 1
yes
IBSR0:BB = 0
yes
Write "0" to IBCR00:ALF to
clear AL flag and interrupt.
Start condition
Slave address
no
no
Write "0" to IBCR00:ALE to
clear AL interrupt.
Interrupt in 9th clock cycle
ACK
Clear IBCR00:ALF bit by software.
Clear IBCR10:INT bit by software
and release SCL line.
Normal control
Data