Fujitsu F2MC-8FX Hardware Manual page 423

Interrupt related register
To set the interrupt level, use the following interrupt level setting register.
Interrupt source
ch.0
Enabling, disabling, and clearing interrupts
Interrupt request enable flag and interrupt request flag
• Transfer interrupt
(Data transfer completion interrupt)
To enable interrupts, use the interrupt request enable bit (IBCR10.INTE).
Control
To disable interrupt requests
To enable interrupt requests
To clear interrupt requests, use the interrupt request flag (IBCR10.INT).
Control
To clear interrupt requests
(Bus error generation interrupt)
To enable interrupts, use the interrupt request enable bit (IBCR10.BEIE).
Control
To disable interrupt requests
To enable interrupt requests
To clear interrupt requests, use the interrupt request flag (IBCR10.BER).
Control
To clear interrupt requests
Interrupt level setting register
Interrupt level register (ILR2)
Address: 0007B
H
Interrupt vector
Address: 0FFE6
Interrupt request enable bit (INTE)
Set the bit to "0".
Set the bit to "1"
Interrupt request flag (INT)
Write "0" to the flag.
Interrupt request enable bit (BEIE)
Set the bit to "0".
Set the bit to "1"
Interrupt request flag (BER)
Write "0" to the flag.
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