Fujitsu F2MC-8FX Hardware Manual page 188

CHAPTER 11 WATCHDOG TIMER
Count clock selector
This selector selects the count clock of the watchdog timer counter.
Watchdog timer counter
This is a 1-bit counter that uses the output of either the timebase timer or watch prescaler as the count
clock.
Reset control circuit
This circuit generates a reset signal when the watchdog timer counter overflows.
Watchdog timer clear selector
This selector selects the watchdog timer clear signal.
Counter clear control circuit
This circuit controls the clearing and stopping of the watchdog timer counter.
Watchdog timer control register (WDTC)
This register performs setup for activating/clearing the watchdog timer counter as well as for selecting the
count clock.
Input Clock
The watchdog timer uses the output clock from either the timebase timer or watch prescaler as the input
clock (count clock).
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