Configuration Of 16-Bit Ppg Timer - Fujitsu F2MC-8FX Hardware Manual

17.2

Configuration of 16-bit PPG Timer

Shown below is the block diagram of the 16-bit PPG timer.
Block Diagram of 16-bit PPG Timer
When upper 8 bits of duty
setting register are written
but lower 8 bits are not
written, the value is 1,
otherwise it is 0.
CKS2 CKS1 CKS0
MCLK/1
MCLK/2
MCLK/4
MCLK/8
Prescaler
MCLK/16
MCLK/32
MCLK/2
MCLK/2
Edge
detection
Pin
TRG0
Figure 17.2-1 Block Diagram of 16-bit PPG Timer
16-bit PPG cycle 16-bit PPG cycle
setting buffer register setting buffer register
(upper 8 bits) (lower 8 bits)
16-bit PPG cycle
setting buffer register
upper 8 bits buffer
1 0
LOAD
CLK
16-bit
down-counter
7
8
STOP
START BORROW
EGS1 EGS0
STGR CNTE RTRG
CHAPTER 17 16-BIT PPG TIMER
16-bit PPG duty 16-bit PPG duty
setting buffer register setting buffer register
(upper 8 bits) (lower 8 bits)
16-bit PPG duty 16-bit PPG duty
setting buffer register setting buffer register
for upper 8 bits buffer for lower 8 bits buffer
Comparator
circuit
MDSE PGMS OSEL POEN
S
Q
R
Interrupt
selection
IRS1 IRS0 IRQF IREN
POEN
Pin
PPG0
Interrupt
of 16-bit PPG
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