Lcd Controller Display Ram - Fujitsu F2MC-8FX Hardware Manual

CHAPTER 24 LCD CONTROLLER
24.5

LCD Controller Display RAM

Display RAM is a 28 x 4 bits (14 bytes) of display data memory used to generate
segment output signals.
Display RAM and Output Pins
The contents of display RAM are read automatically in synchronization with the common signal
selection timing and output from the segment output pins.
Each bit containing "1" is converted to the selected voltage (displayed on the LCD); the one
containing "0" is converted to the unselected voltage (undisplayed on the LCD).
As the LCD display operation is performed asynchronously with the CPU operation, display RAM
can be read from or written to at any timing. Pins not assigned as segment outputs can be used
as I/O ports & the corresponding areas of display RAM can be used as normal RAM. Table 24.5-
1 shows the relationships between duty setting/common outputs and bits used in display RAM.
Figure 24.5-1 shows how display RAM addresses are allocated for common output and segment
output pins.
Address
bit3
n
bit7
bit3
n+1
bit7
bit3
n+2
bit7
: :
: :
bit3
n+11
bit7
bit3
n+14
bit7
bit3
n+15
bit7
COM3
Note: The number of segment output pins depends on each MCU series.
Table 24.5-1 Relationships Between Duty Settings/Common Outputs and Display RAM Bits Used
Duty Setting Common Output Used
COM0 to COM1 (2 pins)
1/2
COM0 to COM2 (3 pins)
1/3
COM0 to COM3 (4 pins)
1/4
: Used
- : Unused
452
Figure 24.5-1 Display RAM and Common/Segment Output Pins
bit2 bit1
bit6 bit5
bit2 bit1
bit6 bit5
bit2 bit1
bit6 bit5
: :
: :
bit2 bit1
bit6 bit5
bit2 bit1
bit6 bit5
bit2 bit1
bit6 bit5
COM2 COM1
bit7
-
-
bit0 SEG00
bit4 SEG01
bit0 SEG02
bit4 SEG03
bit0 SEG04
bit4 SEG05
: :
: :
bit0 SEG22
bit4 SEG23
bit0 SEG28
bit4 SEG29
bit0 SEG30
bit4 SEG31
COM0
Area and common pins used at 1/2 duty
Area and common pins used at 1/3 duty
Area and common pins used at 1/4 duty
Display Data Bits Used
bit6 bit5
-
bit4 bit3 bit2
- -
-
bit1 bit0