Interrupts Of 10-Bit A/D Converter - Fujitsu F2MC-8FX Hardware Manual

23.5

Interrupts of 10-bit A/D Converter

An interrupt source of the 10-bit A/D converter is as follows:
• Completion of conversion when A/D conversion functions are operating.
Interrupts During 10-bit A/D Converter Operation
When A/D conversion is completed, the interrupt request flag bit (ADC1: ADI) is set to "1". Then if the
interrupt request enable bit is enabled (ADC2: ADIE = 1), an interrupt request is issued to the interrupt
controller. Write "0" to the ADI bit using the interrupt service routine to clear the interrupt request.
The ADI bit is set when A/D conversion is completed, irrespective of the value of the ADIE bit.
The CPU cannot return from interrupt processing if the interrupt request flag bit (ADC1: ADI) is 1 with
interrupt requests enabled (ADC2: ADIE = 1). Be sure to clear the ADI bit within the interrupt service
routine.
Register and Vector Table Related to 10-bit A/D Converter Interrupts
Table 23.5-1 Register and Vector Table Related to 10-bit A/D Converter Interrupts
Interrupt Source
10-bit A/D
The interrupt request numbers and vector tables for all peripheral resources are covered in "APPENDIX B
Table of Interrupt Causes".
Interrupt Level Setting
Interrupt
Register
Request
No.
Register
IRQ18 ILR4
CHAPTER 23 10-BIT A/D CONVERTER
Vector Table Address
Setting bit Upper
FFD6
L18
Lower
FFD7
H H
423