Fujitsu F2MC-8FX Hardware Manual page 428

CHAPTER 23 10-BIT A/D CONVERTER
Clock selector
This block selects the A/D conversion clock with continuous activation enabled (ADC2:EXT = 1).
Analog channel selector
This circuit selects one of multiple analog input pins.
Sample-and-hold circuit
This circuit holds the input voltage selected by the analog channel selector. This enables A/D conversion to
be performed without being affected by variation in input voltage during conversion (comparison) by
sampling and holding the input voltage immediately after starting A/D conversion.
Control circuit
The A/D conversion function determines the values in the 10-bit A/D data register sequentially from MSB
to LSB based on the voltage compare signals from the comparator. When conversion is completed, the A/D
conversion function sets the interrupt request flag bit (ADC1: ADI).
A/D data registers (ADDH/ADDL)
The high-order two bits of 10-bit A/D data are stored in the ADDH register; the low-order eight bits are
stored in the ADDL register.
Setting the A/D conversion precision bit (ADC2:AD8) to "1" provides 8-bit precision, storing the upper
eight bits of the 10-bit A/D data in the ADDL register.
A/D control register 1 (ADC1)
This register is used to enable and disable functions, select an analog input pin, check statuses, and control
interrupts.
A/D control register 2 (ADC2)
This register is used to select an input clock, enable and disable interrupts, and select functions.
Input Clock
The 10-bit A/D converter uses the output clock from the prescaler as the input clock (operation clock).
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