Fujitsu F2MC-8FX Hardware Manual page 72

CHAPTER 6 CLOCK CONTROLLER
Table 6.5-1 Functions of Bits in Oscillation Stabilization Wait Time Setting Register (WATR) (2 / 2)
Bit name
MWT3, MWT2,
bit3 MWT1, MWT0:
to Main clock oscillation
bit0 stabilization wait time
selection bits
58
Set the main clock oscillation stabilization wait time.
MWT3 MWT2 MWT1
MWT0
1111
1110
1101
1100
1011
1010
1001
1000
0111
0110
0101
0100
0011
0010
0001
0000
Number of cycles is for a minimum value. Add 1/F
Note: Do not update these bits during main clock oscillation stabilization wait time. You should
update them in main clock mode or main PLL clock mode. You can also update them in
subclock mode.
Function
Number of
Main clock F
Cycles
14
14
(2 -2)/F
2 -2
13
13
(2 -2)/F
2 -2
12
12
(2 -2)/F
2 -2
11
11
(2 -2)/F
2 -2
10
10
(2 -2)/F
2 -2
9
9
(2 -2)/F
2 -2
8
8
(2 -2)/F
2 -2
7
7
(2 -2)/F
2 -2
6
6
(2 -2)/F
2 -2
5
5
(2 -2)/F
2 -2
4
4
(2 -2)/F
2 -2
3
3
(2 -2)/F
2 -2
2
2
(2 -2)/F
2 -2
1
1
(2 -2)/F
2 -2
1
1
(2 -2)/F
2 -2
1
1
(2 -2)/F
2 -2
to the minimum value for a maximum value.
CL
= 4 MHz
CH
About
4.10 ms
CH
About
2.05 ms
CH
About
1.02 ms
CH
511.5 μs
CH
255.5 μs
CH
127.5 μs
CH
63.5 μs
CH
31.5 μs
CH
15.5 μs
CH
7.5 μs
CH
3.5 μs
CH
1.5 μs
CH
0.5 μs
CH
0.0 μs
CH
0.0 μs
CH
0.0 μs
CH