Fujitsu F2MC-8FX Hardware Manual page 369

Transmission in UART/SIO operation mode 1
For transmission in operation mode 1, each register is used as follows.
Figure 20.7-13 Registers Used for Transmission in Operation Mode 1
SCM10 (UART/SIO serial mode control register 1)
bit7
BDS
SCM20 (UART/SIO serial mode control register 2)
bit7
SCKE
SSR0 (UART/SIO serial status and data register)
bit7
-
×
TDR0 (UART/SIO serial output data register)
bit7
TD7
×
RDR0 (UART/SIO serial input data register)
bit7
RD7
: Used bit
x : Unused bit
1 : Set 1
0 : Set 0
The following two procedures can be used to initiate the transmission process:
• Set the transmission operation enable bit (TXE) to "1", then write transmit data to the UART/SIO serial
output data register to start transmission.
• Write transmit data to the UART/SIO serial output data register, then set the transmission operation
enable bit (TXE) to "1" to start transmission.
Transmit data is written to the UART/SIO serial output data register (TDR0) after it is checked that the
transmit data register empty (TDRE) bit is set to "1".
When the transmit data is written to the UART/SIO serial output data register (TDR0), the transmit data
register empty (TDRE) bit is cleared to "0".
When serial transmission is started after transmit data is transferred from the UART/SIO serial output data
register (TDR0) to the transmission shift register, the transmit data register empty (TDRE) bit is set to "1".
bit6 bit5 bit4
PEN TDP SBL
× × ×
bit6 bit5 bit4
TXOE RERC RXE
0
bit6 bit5 bit4
PER OVE
-
× ×
bit6 bit5 bit4
TD6 TD5 TD4
× × ×
bit6 bit5 bit4
RD6 RD5 RD4
bit3 bit2 bit1
CBL1 CBL0 CKS
bit3 bit2 bit1
TXE RIE TCIE
×
bit3 bit2 bit1
FER RDRF TCPL
× ×
bit3 bit2 bit1
TD3 TD2 TD1
× × ×
bit3 bit2 bit1
RD3 RD2 RD1
CHAPTER 20 UART/SIO
← Bit No.
bit0
MD SMC10
1
bit0 ← Bit No.
TEIE SMC20
×
← Bit No.
bit0
TDRE SSR0
×
bit0 ← Bit No.
TD0 TDR0
×
bit0 ← Bit No.
RD0 RDR0
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